dt-bindings: clock: adi,axi-clkgen: convert old binding to yaml format

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/adi,axi-clkgen.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Binding for Analog Devices AXI clkgen pcore clock generator

maintainers:

  - Lars-Peter Clausen <lars@metafoo.de>

  - Michael Hennerich <michael.hennerich@analog.com>

description: |

  The axi_clkgen IP core is a software programmable clock generator,

  that can be synthesized on various FPGA platforms.

  Link: https://wiki.analog.com/resources/fpga/docs/axi_clkgen

properties:

  compatible:

    enum:

      - adi,axi-clkgen-2.00.a

  clocks:

    description:

      Specifies the reference clock(s) from which the output frequency is

      derived. This must either reference one clock if only the first clock

      input is connected or two if both clock inputs are connected.

    minItems: 1

    maxItems: 2

  '#clock-cells':

    const: 0

  reg:

    maxItems: 1

required:

  - compatible

  - reg

  - clocks

  - '#clock-cells'

additionalProperties: false

examples:

  - |

    clock-controller@ff000000 {

      compatible = "adi,axi-clkgen-2.00.a";

      #clock-cells = <0>;

      reg = <0xff000000 0x1000>;

      clocks = <&osc 1>;

    };

Binding for the axi-clkgen clock generator

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:

- compatible : shall be "adi,axi-clkgen-1.00.a" or "adi,axi-clkgen-2.00.a".

- #clock-cells : from common clock binding; Should always be set to 0.

- reg : Address and length of the axi-clkgen register set.

- clocks : Phandle and clock specifier for the parent clock(s). This must

	either reference one clock if only the first clock input is connected or two

	if both clock inputs are connected. For the later case the clock connected

	to the first input must be specified first.

Optional properties:

- clock-output-names : From common clock binding.

Example:

	clock@ff000000 {

		compatible = "adi,axi-clkgen";

		#clock-cells = <0>;

		reg = <0xff000000 0x1000>;

		clocks = <&osc 1>;

	};