Commit bd8f27ba authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'reset-for-4.5-2' of git://git.pengutronix.de/git/pza/linux into next/drivers 

Merge "Reset controller changes for v4.5 v2" from Philipp Zabel:

- oftree support for getting reset devices by index
- fixed return value consistency of of_reset_control_get
- added support for STi co-processor resets
- added STi status callback
- added HiSilicon Hi6220 reset driver
- added ath79 system restart support
- various fixes

* tag 'reset-for-4.5-2' of git://git.pengutronix.de/git/pza/linux:
  reset: ath79: Add system restart support
  arm64: dts: Add reset dts config for Hisilicon Hi6220 SoC
  reset: hi6220: Reset driver for hisilicon hi6220 SoC
  reset: hisilicon: document hisi-hi6220 reset controllers bindings
  reset: remove unused device pointer from struct reset_control
parents 7eccfebf ba64e27e

Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt

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Hisilicon System Reset Controller

======================================



Please also refer to reset.txt in this directory for common reset

controller binding usage.



The reset controller registers are part of the system-ctl block on

hi6220 SoC.



Required properties:

- compatible: may be "hisilicon,hi6220-sysctrl"

- reg: should be register base and length as documented in the

  datasheet

- #reset-cells: 1, see below



Example:

sys_ctrl: sys_ctrl@f7030000 {

	compatible = "hisilicon,hi6220-sysctrl", "syscon";

	reg = <0x0 0xf7030000 0x0 0x2000>;

	#clock-cells = <1>;

	#reset-cells = <1>;

};



Specifying reset lines connected to IP modules

==============================================

example:



        uart1: serial@..... {

                ...

                resets = <&sys_ctrl PERIPH_RSTEN3_UART1>;

                ...

        };



The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>.

arch/arm64/boot/dts/hisilicon/hi6220.dtsi

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@@ -147,6 +147,7 @@ 
			compatible = "hisilicon,hi6220-sysctrl", "syscon";

			reg = <0x0 0xf7030000 0x0 0x2000>;

			#clock-cells = <1>;

			#reset-cells = <1>;

		};



		media_ctrl: media_ctrl@f4410000 {

drivers/reset/Kconfig

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@@ -13,3 +13,4 @@ menuconfig RESET_CONTROLLER 
	  If unsure, say no.



source "drivers/reset/sti/Kconfig"

source "drivers/reset/hisilicon/Kconfig"

drivers/reset/Makefile

+1 −0
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@@ -4,5 +4,6 @@ obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o 
obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o

obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o

obj-$(CONFIG_ARCH_STI) += sti/

obj-$(CONFIG_ARCH_HISI) += hisilicon/

obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o

obj-$(CONFIG_ATH79) += reset-ath79.o

drivers/reset/core.c

+1 −8
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@@ -30,7 +30,6 @@ static LIST_HEAD(reset_controller_list); 
 */

struct reset_control {

	struct reset_controller_dev *rcdev;

	struct device *dev;

	unsigned int id;

};
@@ -236,16 +235,10 @@ EXPORT_SYMBOL_GPL(of_reset_control_get); 
 */

struct reset_control *reset_control_get(struct device *dev, const char *id)

{

	struct reset_control *rstc;



	if (!dev)

		return ERR_PTR(-EINVAL);



	rstc = of_reset_control_get(dev->of_node, id);

	if (!IS_ERR(rstc))

		rstc->dev = dev;



	return rstc;

	return of_reset_control_get(dev->of_node, id);

}

EXPORT_SYMBOL_GPL(reset_control_get);

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