Commit bd76a4f9 authored by Dalon Westergreen's avatar Dalon Westergreen Committed by Dinh Nguyen
Browse files

ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes 



The ptp_ref clock for Arria10 defaults to using the peripheral
pll emac ptp clock.  Without the ptp_ref clock in the gmac nodes
the driver defaults to the gmac main clock resulting in an
incorrect period for the ptp counter.

Signed-off-by: default avatarDalon Westergreen <dalon.westergreen@linux.intel.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 80f132d7

arch/arm/boot/dts/socfpga_arria10.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -431,8 +431,8 @@ 
			snps,perfect-filter-entries = <128>;

			tx-fifo-depth = <4096>;

			rx-fifo-depth = <16384>;

			clocks = <&l4_mp_clk>;

			clock-names = "stmmaceth";

			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;

			clock-names = "stmmaceth", "ptp_ref";

			resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			snps,axi-config = <&socfpga_axi_setup>;
@@ -451,8 +451,8 @@ 
			snps,perfect-filter-entries = <128>;

			tx-fifo-depth = <4096>;

			rx-fifo-depth = <16384>;

			clocks = <&l4_mp_clk>;

			clock-names = "stmmaceth";

			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;

			clock-names = "stmmaceth", "ptp_ref";

			resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			snps,axi-config = <&socfpga_axi_setup>;
@@ -471,8 +471,8 @@ 
			snps,perfect-filter-entries = <128>;

			tx-fifo-depth = <4096>;

			rx-fifo-depth = <16384>;

			clocks = <&l4_mp_clk>;

			clock-names = "stmmaceth";

			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;

			clock-names = "stmmaceth", "ptp_ref";

			resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;

			reset-names = "stmmaceth", "stmmaceth-ocp";

			snps,axi-config = <&socfpga_axi_setup>;

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