staging:iio:ad7887: Preallocate sample buffer

	/*

	 * DMA (thus cache coherency maintenance) requires the

	 * transfer buffers to live in their own cache lines.

	 * Buffer needs to be large enough to hold two 16 bit samples and a

	 * 64 bit aligned 64 bit timestamp.

	 */

	unsigned char			data[4] ____cacheline_aligned;

	unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]

		____cacheline_aligned;

};

enum ad7887_supported_device_ids {

	struct iio_dev *indio_dev = pf->indio_dev;

	struct ad7887_state *st = iio_priv(indio_dev);

	s64 time_ns;

	__u8 *buf;

	int b_sent;

	unsigned int bytes = bitmap_weight(indio_dev->active_scan_mask,

					   indio_dev->masklength) *

		st->chip_info->channel[0].scan_type.storagebits / 8;

	buf = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);

	if (buf == NULL)

		goto done;

	b_sent = spi_sync(st->spi, st->ring_msg);

	if (b_sent)

		goto done;

	time_ns = iio_get_time_ns();

	memcpy(buf, st->data, bytes);

	if (indio_dev->scan_timestamp)

		memcpy(buf + indio_dev->scan_bytes - sizeof(s64),

		memcpy(st->data + indio_dev->scan_bytes - sizeof(s64),

		       &time_ns, sizeof(time_ns));

	iio_push_to_buffer(indio_dev->buffer, buf);

	iio_push_to_buffer(indio_dev->buffer, st->data);

done:

	kfree(buf);

	iio_trigger_notify_done(indio_dev->trig);

	return IRQ_HANDLED;