x86/tsc: Add tsc_early_khz command line parameter (bd35c77e) · Commits · 戴 / test

Changing base clock frequency directly impacts TSC Hz but not CPUID.16h value. An overclocked CPU supporting CPUID.16h and with partial CPUID.15h support will set TSC KHZ according to "best guess" given by CPUID.16h relying on tsc_refine_calibration_work to give better numbers later. tsc_refine_calibration_work will refuse to do its work when the outcome is off the early TSC KHZ value by more than 1% which is certain to happen on an overclocked system. Fix this by adding a tsc_early_khz command line parameter that makes the kernel skip early TSC calibration and use the given value instead. This allows the user to provide the expected TSC frequency that is closer to reality than the one reported by the hardware, enabling tsc_refine_calibration_work to do meaningful error checking. [ tglx: Made the variable __initdata as it's only used on init and removed the error checking in the argument parser because kstrto*() only stores to the variable if the string is valid ] Signed-off-by:

Krzysztof Piecuch <piecuch@protonmail.com> Signed-off-by:

Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/O2CpIOrqLZHgNRkfjRpz_LGqnc1ix_seNIiOCvHY4RHoulOVRo6kMXKuLOfBVTi0SMMevg6Go1uZ_cL9fLYtYdTRNH78ChaFaZyG3VAyYz8=@protonmail.com

Documentation/admin-guide/kernel-parameters.txt

+6 −0

Original line number	Diff line number	Diff line
		@@ -5067,6 +5067,12 @@
		interruptions from clocksource watchdog are not
		acceptable).

		tsc_early_khz= [X86] Skip early TSC calibration and use the given
		value instead. Useful when the early TSC frequency discovery
		procedure is not reliable, such as on overclocked systems
		with CPUID.16h support and partial CPUID.15h support.
		Format: <unsigned int>

		tsx= [X86] Control Transactional Synchronization
		Extensions (TSX) feature in Intel processors that
		support TSX control.

arch/x86/kernel/tsc.c

+11 −1

Original line number	Diff line number	Diff line
		@@ -41,6 +41,7 @@ EXPORT_SYMBOL(tsc_khz);
		* TSC can be unstable due to cpufreq or due to unsynced TSCs
		*/
		static int __read_mostly tsc_unstable;
		static unsigned int __initdata tsc_early_khz;

		static DEFINE_STATIC_KEY_FALSE(__use_tsc);

		@@ -59,6 +60,12 @@ struct cyc2ns {

		static DEFINE_PER_CPU_ALIGNED(struct cyc2ns, cyc2ns);

		static int __init tsc_early_khz_setup(char *buf)
		{
		return kstrtouint(buf, 0, &tsc_early_khz);
		}
		early_param("tsc_early_khz", tsc_early_khz_setup);

		__always_inline void cyc2ns_read_begin(struct cyc2ns_data *data)
		{
		int seq, idx;
		@@ -1412,6 +1419,9 @@ static bool __init determine_cpu_tsc_frequencies(bool early)

		if (early) {
		cpu_khz = x86_platform.calibrate_cpu();
		if (tsc_early_khz)
		tsc_khz = tsc_early_khz;
		else
		tsc_khz = x86_platform.calibrate_tsc();
		} else {
		/* We should not be here with non-native cpu calibration */

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