Commit bd13c6cb authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'ti-clk-fixes-4.16' of https://github.com/t-kristo/linux-pm into clk-fixes 

Pull TI SoC clock fixes for 4.16 from Tero Kristo:

* tag 'ti-clk-fixes-4.16' of https://github.com/t-kristo/linux-pm:
  clk: ti: am43xx: add set-rate-parent support for display clkctrl clock
  clk: ti: am33xx: add set-rate-parent support for display clkctrl clock
  clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag
parents a88bb86d 762790b7

drivers/clk/ti/clk-33xx.c

+1 −1
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ static const struct omap_clkctrl_bit_data am3_gpio4_bit_data[] __initconst = { 


static const struct omap_clkctrl_reg_data am3_l4_per_clkctrl_regs[] __initconst = {

	{ AM3_CPGMAC0_CLKCTRL, NULL, CLKF_SW_SUP, "cpsw_125mhz_gclk", "cpsw_125mhz_clkdm" },

	{ AM3_LCDC_CLKCTRL, NULL, CLKF_SW_SUP, "lcd_gclk", "lcdc_clkdm" },

	{ AM3_LCDC_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_SET_RATE_PARENT, "lcd_gclk", "lcdc_clkdm" },

	{ AM3_USB_OTG_HS_CLKCTRL, NULL, CLKF_SW_SUP, "usbotg_fck", "l3s_clkdm" },

	{ AM3_TPTC0_CLKCTRL, NULL, CLKF_SW_SUP, "l3_gclk", "l3_clkdm" },

	{ AM3_EMIF_CLKCTRL, NULL, CLKF_SW_SUP, "dpll_ddr_m2_div2_ck", "l3_clkdm" },

drivers/clk/ti/clk-43xx.c

+1 −1
Original line number Diff line number Diff line
@@ -187,7 +187,7 @@ static const struct omap_clkctrl_reg_data am4_l4_per_clkctrl_regs[] __initconst 
	{ AM4_OCP2SCP0_CLKCTRL, NULL, CLKF_SW_SUP, "l4ls_gclk" },

	{ AM4_OCP2SCP1_CLKCTRL, NULL, CLKF_SW_SUP, "l4ls_gclk" },

	{ AM4_EMIF_CLKCTRL, NULL, CLKF_SW_SUP, "dpll_ddr_m2_ck", "emif_clkdm" },

	{ AM4_DSS_CORE_CLKCTRL, NULL, CLKF_SW_SUP, "disp_clk", "dss_clkdm" },

	{ AM4_DSS_CORE_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_SET_RATE_PARENT, "disp_clk", "dss_clkdm" },

	{ AM4_CPGMAC0_CLKCTRL, NULL, CLKF_SW_SUP, "cpsw_125mhz_gclk", "cpsw_125mhz_clkdm" },

	{ 0 },

};

drivers/clk/ti/clkctrl.c

+2 −0
Original line number Diff line number Diff line
@@ -537,6 +537,8 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node) 
		init.parent_names = &reg_data->parent;

		init.num_parents = 1;

		init.flags = 0;

		if (reg_data->flags & CLKF_SET_RATE_PARENT)

			init.flags |= CLK_SET_RATE_PARENT;

		init.name = kasprintf(GFP_KERNEL, "%s:%s:%04x:%d",

				      node->parent->name, node->name,

				      reg_data->offset, 0);

CRA Git | Maintained and supported by SUSTech CRA and CCSE