Commit bceda6e6 authored by Wenpeng Liang's avatar Wenpeng Liang Committed by Jason Gunthorpe
Browse files

RDMA/hns: Remove meaningless prints 

ceq and aeq is a ring buffer, consumer index of them will be set to zero
after reaching the maximum value. The warning should be removed or it may
mislead the users.

Link: https://lore.kernel.org/r/1584674622-52773-8-git-send-email-liweihang@huawei.com


Signed-off-by: default avatarWenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: default avatarWeihang Li <liweihang@huawei.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent f91b9196

drivers/infiniband/hw/hns/hns_roce_hw_v1.c

+2 −7
Original line number Diff line number Diff line
@@ -3935,11 +3935,9 @@ static int hns_roce_v1_aeq_int(struct hns_roce_dev *hr_dev, 
		eq->cons_index++;

		aeqes_found = 1;



		if (eq->cons_index > 2 * hr_dev->caps.aeqe_depth - 1) {

			dev_warn(dev, "cons_index overflow, set back to 0.\n");

		if (eq->cons_index > 2 * hr_dev->caps.aeqe_depth - 1)

			eq->cons_index = 0;

	}

	}



	set_eq_cons_index_v1(eq, 0);
@@ -3988,12 +3986,9 @@ static int hns_roce_v1_ceq_int(struct hns_roce_dev *hr_dev, 
		ceqes_found = 1;



		if (eq->cons_index >

		    EQ_DEPTH_COEFF * hr_dev->caps.ceqe_depth - 1) {

			dev_warn(&eq->hr_dev->pdev->dev,

				"cons_index overflow, set back to 0.\n");

		    EQ_DEPTH_COEFF * hr_dev->caps.ceqe_depth - 1)

			eq->cons_index = 0;

	}

	}



	set_eq_cons_index_v1(eq, 0);

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+1 −4
Original line number Diff line number Diff line
@@ -5361,7 +5361,6 @@ static struct hns_roce_ceqe *next_ceqe_sw_v2(struct hns_roce_eq *eq) 
static int hns_roce_v2_ceq_int(struct hns_roce_dev *hr_dev,

			       struct hns_roce_eq *eq)

{

	struct device *dev = hr_dev->dev;

	struct hns_roce_ceqe *ceqe = next_ceqe_sw_v2(eq);

	int ceqe_found = 0;

	u32 cqn;
@@ -5380,10 +5379,8 @@ static int hns_roce_v2_ceq_int(struct hns_roce_dev *hr_dev, 
		++eq->cons_index;

		ceqe_found = 1;



		if (eq->cons_index > (EQ_DEPTH_COEFF * eq->entries - 1)) {

			dev_warn(dev, "cons_index overflow, set back to 0.\n");

		if (eq->cons_index > (EQ_DEPTH_COEFF * eq->entries - 1))

			eq->cons_index = 0;

		}



		ceqe = next_ceqe_sw_v2(eq);

	}

CRA Git | Maintained and supported by SUSTech CRA and CCSE