Commit bca8f17f authored by Marc Zyngier's avatar Marc Zyngier Committed by Catalin Marinas
Browse files

arm64: Get rid of asm/opcodes.h 



The opcodes.h drags in a lot of definition from the 32bit port, most
of which is not required at all. Clean things up a bit by moving
the bare minimum of what is required next to the actual users,
and drop the include file.

Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 34a6980c

arch/arm64/include/asm/opcodes.h

deleted100644 → 0
+0 −5
Original line number Diff line number Diff line 
#ifdef CONFIG_CPU_BIG_ENDIAN

#define CONFIG_CPU_ENDIAN_BE8 CONFIG_CPU_BIG_ENDIAN

#endif



#include <../../arm/include/asm/opcodes.h>

arch/arm64/include/asm/sysreg.h

+10 −6
Original line number Diff line number Diff line
@@ -22,8 +22,6 @@ 


#include <linux/stringify.h>



#include <asm/opcodes.h>



/*

 * ARMv8 ARM reserves the following encoding for system registers:

 * (Ref: ARMv8 ARM, Section: "System instruction class encoding overview",
@@ -37,6 +35,12 @@ 
#define sys_reg(op0, op1, crn, crm, op2) \

	((((op0)&3)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))



#ifdef __ASSEMBLY__

#define __emit_inst(x)			.inst (x)

#else

#define __emit_inst(x)			".inst " __stringify((x)) "\n\t"

#endif



#define SYS_MIDR_EL1			sys_reg(3, 0, 0, 0, 0)

#define SYS_MPIDR_EL1			sys_reg(3, 0, 0, 0, 5)

#define SYS_REVIDR_EL1			sys_reg(3, 0, 0, 0, 6)
@@ -81,9 +85,9 @@ 
#define REG_PSTATE_PAN_IMM		sys_reg(0, 0, 4, 0, 4)

#define REG_PSTATE_UAO_IMM		sys_reg(0, 0, 4, 0, 3)



#define SET_PSTATE_PAN(x) __inst_arm(0xd5000000 | REG_PSTATE_PAN_IMM |\

#define SET_PSTATE_PAN(x) __emit_inst(0xd5000000 | REG_PSTATE_PAN_IMM |	\

				      (!!x)<<8 | 0x1f)

#define SET_PSTATE_UAO(x) __inst_arm(0xd5000000 | REG_PSTATE_UAO_IMM |\

#define SET_PSTATE_UAO(x) __emit_inst(0xd5000000 | REG_PSTATE_UAO_IMM |	\

				      (!!x)<<8 | 0x1f)



/* Common SCTLR_ELx flags. */

arch/arm64/kernel/armv8_deprecated.c

+4 −1
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@ 


#include <asm/cpufeature.h>

#include <asm/insn.h>

#include <asm/opcodes.h>

#include <asm/sysreg.h>

#include <asm/system_misc.h>

#include <asm/traps.h>
@@ -351,6 +350,10 @@ static int emulate_swpX(unsigned int address, unsigned int *data, 
	return res;

}



#define ARM_OPCODE_CONDTEST_FAIL   0

#define ARM_OPCODE_CONDTEST_PASS   1

#define ARM_OPCODE_CONDTEST_UNCOND 2



#define	ARM_OPCODE_CONDITION_UNCOND	0xf



static unsigned int __kprobes aarch32_check_condition(u32 opcode, u32 psr)

arch/arm64/kernel/insn.c

+0 −1
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@ 
#include <asm/cacheflush.h>

#include <asm/debug-monitors.h>

#include <asm/fixmap.h>

#include <asm/opcodes.h>

#include <asm/insn.h>



#define AARCH64_INSN_SF_BIT	BIT(31)

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