Commit bc620474 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
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arm64: dts: renesas: r8a77980: add I2C support 



Define the generic R8A77980 parts of the I2C[0-5] device nodes.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: default avatarVladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 56195dc5

arch/arm64/boot/dts/renesas/r8a77980.dtsi

+105 −0
Original line number Diff line number Diff line
@@ -16,6 +16,15 @@ 
	#address-cells = <2>;

	#size-cells = <2>;



	aliases {

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		i2c2 = &i2c2;

		i2c3 = &i2c3;

		i2c4 = &i2c4;

		i2c5 = &i2c5;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -135,6 +144,102 @@ 
			#power-domain-cells = <1>;

		};



		i2c0: i2c@e6500000 {

			compatible = "renesas,i2c-r8a77980",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe6500000 0 0x40>;

			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 931>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 931>;

			dmas = <&dmac1 0x91>, <&dmac1 0x90>,

			       <&dmac2 0x91>, <&dmac2 0x90>;

			dma-names = "tx", "rx", "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c1: i2c@e6508000 {

			compatible = "renesas,i2c-r8a77980",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe6508000 0 0x40>;

			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 930>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 930>;

			dmas = <&dmac1 0x93>, <&dmac1 0x92>,

			       <&dmac2 0x93>, <&dmac2 0x92>;

			dma-names = "tx", "rx", "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c2: i2c@e6510000 {

			compatible = "renesas,i2c-r8a77980",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe6510000 0 0x40>;

			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 929>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 929>;

			dmas = <&dmac1 0x95>, <&dmac1 0x94>,

			       <&dmac2 0x95>, <&dmac2 0x94>;

			dma-names = "tx", "rx", "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c3: i2c@e66d0000 {

			compatible = "renesas,i2c-r8a77980",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe66d0000 0 0x40>;

			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 928>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 928>;

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c4: i2c@e66d8000 {

			compatible = "renesas,i2c-r8a77980",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe66d8000 0 0x40>;

			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 927>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 927>;

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c5: i2c@e66e0000 {

			compatible = "renesas,i2c-r8a77980",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe66e0000 0 0x40>;

			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 919>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 919>;

			dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,

			       <&dmac2 0x9b>, <&dmac2 0x9a>;

			dma-names = "tx", "rx", "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		hscif0: serial@e6540000 {

			compatible = "renesas,hscif-r8a77980",

				     "renesas,rcar-gen3-hscif",

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