drm/amdgpu: add info ioctl query for vce clock info (v3) (bbe87974) · Commits · 戴 / test

This is needed to set up the vce clock table in userspace for proper VCE DPM. v2: fix copy paste typo in comment v3: track number of valid states Reviewed-by:

Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:

Christian König <christian.koenig@amd.com> Signed-off-by:

Alex Deucher <alexander.deucher@amd.com>

include/uapi/drm/amdgpu_drm.h

+20 −0

Original line number	Diff line number	Diff line
		@@ -491,6 +491,8 @@ struct drm_amdgpu_cs_chunk_data {
		#define AMDGPU_INFO_NUM_EVICTIONS 0x18
		/* Query memory about VRAM and GTT domains */
		#define AMDGPU_INFO_MEMORY 0x19
		/* Query vce clock table */
		#define AMDGPU_INFO_VCE_CLOCK_TABLE 0x1A

		#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
		#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
		@@ -677,6 +679,24 @@ struct drm_amdgpu_info_hw_ip {
		__u32 _pad;
		};

		#define AMDGPU_VCE_CLOCK_TABLE_ENTRIES 6

		struct drm_amdgpu_info_vce_clock_table_entry {
		/** System clock */
		__u32 sclk;
		/** Memory clock */
		__u32 mclk;
		/** VCE clock */
		__u32 eclk;
		__u32 pad;
		};

		struct drm_amdgpu_info_vce_clock_table {
		struct drm_amdgpu_info_vce_clock_table_entry entries[AMDGPU_VCE_CLOCK_TABLE_ENTRIES];
		__u32 num_valid_entries;
		__u32 pad;
		};

		/*
		* Supported GPU families
		*/

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