drm/amdgpu/gfx10: require to pin/unpin CSIB BO when suspend/resume (bbd7a653) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+38 −0

Original line number	Diff line number	Diff line
		@@ -813,6 +813,39 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
		return 0;
		}

		static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev)
		{
		int r;

		r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
		if (unlikely(r != 0))
		return r;

		r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
		AMDGPU_GEM_DOMAIN_VRAM);
		if (!r)
		adev->gfx.rlc.clear_state_gpu_addr =
		amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);

		return r;
		}

		static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev)
		{
		int r;

		if (!adev->gfx.rlc.clear_state_obj)
		return;

		r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
		if (likely(r == 0)) {
		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
		}
		}

		static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)
		{
		amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
		@@ -3494,6 +3527,10 @@ static int gfx_v10_0_hw_init(void *handle)
		int r;
		struct amdgpu_device adev = (struct amdgpu_device )handle;

		r = gfx_v10_0_csb_vram_pin(adev);
		if (r)
		return r;

		if (!amdgpu_emu_mode)
		gfx_v10_0_init_golden_registers(adev);

		@@ -3581,6 +3618,7 @@ static int gfx_v10_0_hw_fini(void *handle)
		}
		gfx_v10_0_cp_enable(adev, false);
		gfx_v10_0_enable_gui_idle_interrupt(adev, false);
		gfx_v10_0_csb_vram_unpin(adev);

		return 0;
		}