Commit bbc4fd12 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze 

* 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze: (49 commits)
  microblaze: Add KGDB support
  microblaze: Support brki rX, 0x18 for user application debugging
  microblaze: Remove nop after MSRCLR/SET, MTS, MFS instructions
  microblaze: Simplify syscall rutine
  microblaze: Move PT_MODE saving to delay slot
  microblaze: Fix _interrupt function
  microblaze: Fix _user_exception function
  microblaze: Put together addik instructions
  microblaze: Use delay slot in syscall macros
  microblaze: Save kernel mode in delay slot
  microblaze: Do not mix register saving and mode setting
  microblaze: Move SAVE_STATE upward
  microblaze: entry.S: Macro optimization
  microblaze: Optimize hw exception rutine
  microblaze: Implement clear_ums macro and fix SAVE_STATE macro
  microblaze: Remove additional setup for kernel_mode
  microblaze: Optimize SAVE_STATE macro
  microblaze: Remove additional loading
  microblaze: Completely remove working with R11 register
  microblaze: Do not setup BIP in _debug_exception
  ...
parents 673b864f 2d5973cb

arch/microblaze/Kconfig

+31 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ config MICROBLAZE 
	select USB_ARCH_HAS_EHCI

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select HAVE_OPROFILE

	select HAVE_ARCH_KGDB

	select HAVE_DMA_ATTRS

	select HAVE_DMA_API_DEBUG

	select TRACING_SUPPORT
@@ -223,6 +224,36 @@ config TASK_SIZE 
	hex "Size of user task space" if TASK_SIZE_BOOL

	default "0x80000000"



choice

	prompt "Page size"

	default MICROBLAZE_4K_PAGES

	depends on ADVANCED_OPTIONS && !MMU

	help

	  Select the kernel logical page size. Increasing the page size

	  will reduce software overhead at each page boundary, allow

	  hardware prefetch mechanisms to be more effective, and allow

	  larger dma transfers increasing IO efficiency and reducing

	  overhead. However the utilization of memory will increase.

	  For example, each cached file will using a multiple of the

	  page size to hold its contents and the difference between the

	  end of file and the end of page is wasted.



	  If unsure, choose 4K_PAGES.



config MICROBLAZE_4K_PAGES

	bool "4k page size"



config MICROBLAZE_8K_PAGES

	bool "8k page size"



config MICROBLAZE_16K_PAGES

	bool "16k page size"



config MICROBLAZE_32K_PAGES

	bool "32k page size"



endchoice



endmenu



source "mm/Kconfig"

arch/microblaze/Kconfig.debug

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ source "lib/Kconfig.debug" 


config EARLY_PRINTK

	bool "Early printk function for kernel"

	depends on SERIAL_UARTLITE_CONSOLE

	default n

	help

	  This option turns on/off early printk messages to console.

arch/microblaze/boot/Makefile

+6 −5
Original line number Diff line number Diff line
@@ -35,7 +35,8 @@ quiet_cmd_cp = CP $< $@$2 
	cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)



quiet_cmd_strip = STRIP   $@

      cmd_strip = $(STRIP) -K _start -K _end -K __log_buf -K _fdt_start vmlinux -o $@

	cmd_strip = $(STRIP) -K microblaze_start -K _end -K __log_buf \

				-K _fdt_start vmlinux -o $@



quiet_cmd_uimage = UIMAGE  $@.ub

	cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A microblaze -O linux -T kernel \

arch/microblaze/include/asm/cacheflush.h

+13 −5
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 


/* Somebody depends on this; sigh... */

#include <linux/mm.h>

#include <linux/io.h>



/* Look at Documentation/cachetlb.txt */
@@ -60,7 +61,6 @@ void microblaze_cache_init(void); 
#define invalidate_icache()				mbc->iin();

#define invalidate_icache_range(start, end)		mbc->iinr(start, end);





#define flush_icache_user_range(vma, pg, adr, len)	flush_icache();

#define flush_icache_page(vma, pg)			do { } while (0)
@@ -72,9 +72,15 @@ void microblaze_cache_init(void); 
#define flush_dcache()					mbc->dfl();

#define flush_dcache_range(start, end)			mbc->dflr(start, end);



#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0

/* D-cache aliasing problem can't happen - cache is between MMU and ram */

#define flush_dcache_page(page)			do { } while (0)

#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1

/* MS: We have to implement it because of rootfs-jffs2 issue on WB */

#define flush_dcache_page(page) \

do { \

	unsigned long addr = (unsigned long) page_address(page); /* virtual */ \

	addr = (u32)virt_to_phys((void *)addr); \

	flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \

} while (0);



#define flush_dcache_mmap_lock(mapping)		do { } while (0)

#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
@@ -97,8 +103,10 @@ void microblaze_cache_init(void); 


#define copy_to_user_page(vma, page, vaddr, dst, src, len)		\

do {									\

	u32 addr = virt_to_phys(dst);					\

	invalidate_icache_range((unsigned) (addr), (unsigned) (addr) + (len));\

	memcpy((dst), (src), (len));					\

	flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len));	\

	flush_dcache_range((unsigned) (addr), (unsigned) (addr) + (len));\

} while (0)



#define copy_from_user_page(vma, page, vaddr, dst, src, len)		\

arch/microblaze/include/asm/dma-mapping.h

+0 −6
Original line number Diff line number Diff line
@@ -79,12 +79,6 @@ static inline int dma_supported(struct device *dev, u64 mask) 
	return ops->dma_supported(dev, mask);

}



#ifdef CONFIG_PCI

/* We have our own implementation of pci_set_dma_mask() */

#define HAVE_ARCH_PCI_SET_DMA_MASK



#endif



static inline int dma_set_mask(struct device *dev, u64 dma_mask)

{

	struct dma_map_ops *ops = get_dma_ops(dev);

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