Commit bbc11b34 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'fpga-for-5.10' of...

Merge tag 'fpga-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga

 into char-misc-next

Moritz writes:

Here is the first set of changes for the 5.10-rc1 merge window.

Xilinx:
- Luca's changes clean up the xilinx-spi driver and add better
  diagnostics on errors.

Core:
- I cleaned up a stray comment.
- Richard's change marks FPGA manager tasks un-interruptible.
- Tom has agreed to help out as Reviewer in the FPGA Manager subsystem.

DFL:
- Xu's changes  add a new bus that is the first part of a series to support
  adding devices via DFL (the other parts are still under review)

All patches have been reviewed on the mailing list, and have been in the
last few linux-next releases (as part of my for-next branch) without issues.

Signed-off-by: default avatarMoritz Fischer <mdf@kernel.org>

* tag 'fpga-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
  fpga: dfl: create a dfl bus type to support DFL devices
  fpga: fpga-region: Cleanup an outdated comment
  fpga: dfl: map feature mmio resources in their own feature drivers
  fpga manager: xilinx-spi: provide better diagnostics on programming failure
  fpga manager: xilinx-spi: add error checking after gpiod_get_value()
  fpga manager: xilinx-spi: fix write_complete timeout handling
  fpga manager: xilinx-spi: remove final dot from dev_err() strings
  fpga manager: xilinx-spi: remove stray comment
  fpga: dfl: change data type of feature id to u16
  MAINTAINERS: Add Tom Rix as fpga reviewer
  fpga: stratix10-soc: make FPGA task un-interruptible
parents 05fa34dc 9ba3a0aa
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+15 −0
Original line number Diff line number Diff line
What:		/sys/bus/dfl/devices/dfl_dev.X/type
Date:		Aug 2020
KernelVersion:	5.10
Contact:	Xu Yilun <yilun.xu@intel.com>
Description:	Read-only. It returns type of DFL FIU of the device. Now DFL
		supports 2 FIU types, 0 for FME, 1 for PORT.
		Format: 0x%x

What:		/sys/bus/dfl/devices/dfl_dev.X/feature_id
Date:		Aug 2020
KernelVersion:	5.10
Contact:	Xu Yilun <yilun.xu@intel.com>
Description:	Read-only. It returns feature identifier local to its DFL FIU
		type.
		Format: 0x%x
+3 −0
Original line number Diff line number Diff line
@@ -6828,14 +6828,17 @@ F: drivers/net/ethernet/nvidia/*
FPGA DFL DRIVERS
M:	Wu Hao <hao.wu@intel.com>
R:	Tom Rix <trix@redhat.com>
L:	linux-fpga@vger.kernel.org
S:	Maintained
F:	Documentation/ABI/testing/sysfs-bus-dfl
F:	Documentation/fpga/dfl.rst
F:	drivers/fpga/dfl*
F:	include/uapi/linux/fpga-dfl.h
FPGA MANAGER FRAMEWORK
M:	Moritz Fischer <mdf@kernel.org>
R:	Tom Rix <trix@redhat.com>
L:	linux-fpga@vger.kernel.org
S:	Maintained
W:	http://www.rocketboards.org
+1 −1
Original line number Diff line number Diff line
@@ -148,7 +148,7 @@ struct fme_perf_priv {
	struct device *dev;
	void __iomem *ioaddr;
	struct pmu pmu;
	u64 id;
	u16 id;

	u32 fab_users;
	u32 fab_port_id;
+11 −13
Original line number Diff line number Diff line
@@ -31,12 +31,12 @@ struct cci_drvdata {
	struct dfl_fpga_cdev *cdev;	/* container device */
};

static void __iomem *cci_pci_ioremap_bar(struct pci_dev *pcidev, int bar)
static void __iomem *cci_pci_ioremap_bar0(struct pci_dev *pcidev)
{
	if (pcim_iomap_regions(pcidev, BIT(bar), DRV_NAME))
	if (pcim_iomap_regions(pcidev, BIT(0), DRV_NAME))
		return NULL;

	return pcim_iomap_table(pcidev)[bar];
	return pcim_iomap_table(pcidev)[0];
}

static int cci_pci_alloc_irq(struct pci_dev *pcidev)
@@ -156,8 +156,8 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
			goto irq_free_exit;
	}

	/* start to find Device Feature List from Bar 0 */
	base = cci_pci_ioremap_bar(pcidev, 0);
	/* start to find Device Feature List in Bar 0 */
	base = cci_pci_ioremap_bar0(pcidev);
	if (!base) {
		ret = -ENOMEM;
		goto irq_free_exit;
@@ -172,7 +172,7 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
		start = pci_resource_start(pcidev, 0);
		len = pci_resource_len(pcidev, 0);

		dfl_fpga_enum_info_add_dfl(info, start, len, base);
		dfl_fpga_enum_info_add_dfl(info, start, len);

		/*
		 * find more Device Feature Lists (e.g. Ports) per information
@@ -196,26 +196,24 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
			 */
			bar = FIELD_GET(FME_PORT_OFST_BAR_ID, v);
			offset = FIELD_GET(FME_PORT_OFST_DFH_OFST, v);
			base = cci_pci_ioremap_bar(pcidev, bar);
			if (!base)
				continue;

			start = pci_resource_start(pcidev, bar) + offset;
			len = pci_resource_len(pcidev, bar) - offset;

			dfl_fpga_enum_info_add_dfl(info, start, len,
						   base + offset);
			dfl_fpga_enum_info_add_dfl(info, start, len);
		}
	} else if (dfl_feature_is_port(base)) {
		start = pci_resource_start(pcidev, 0);
		len = pci_resource_len(pcidev, 0);

		dfl_fpga_enum_info_add_dfl(info, start, len, base);
		dfl_fpga_enum_info_add_dfl(info, start, len);
	} else {
		ret = -ENODEV;
		goto irq_free_exit;
	}

	/* release I/O mappings for next step enumeration */
	pcim_iounmap_regions(pcidev, BIT(0));

	/* start enumeration with prepared enumeration information */
	cdev = dfl_fpga_feature_devs_enumerate(info);
	if (IS_ERR(cdev)) {
+399 −78

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