Commit bae2b7f6 authored Aug 28, 2020 by Ahmad Fatoum Committed by Alexandre Torgue Sep 23, 2020

ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC



The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

parent 57592d2a

arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts

+1 −0

Original line number	Diff line number	Diff line
		@@ -212,6 +212,7 @@
		pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
		pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
		bus-width = <8>;
		mmc-ddr-3_3v;
		no-1-8-v;
		no-sd;
		no-sdio;

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