Commit bad0ae3f authored by Mark Brown's avatar Mark Brown
Browse files

Merge tag 'spi-fix-v4.5-rc7' into spi-linus 

spi: Fixes for v4.5

A few driver specific fixes for the Rockchip and i.MX SPI controllers,
especially for the i.MX they're annoying bugs if you run into them.

# gpg: Signature made Thu 10 Mar 2016 11:09:57 ICT using RSA key ID 5D5487D0
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# gpg: key 5621E907 marked as ultimately trusted
# gpg: key 5C6153AD: no public key for trusted key - skipped
# gpg: key 5C6153AD marked as ultimately trusted
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg:                 aka "Mark Brown <broonie@debian.org>"
# gpg:                 aka "Mark Brown <broonie@kernel.org>"
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg:                 aka "Mark Brown <broonie@linaro.org>"
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>"
parents f6cede5b 3ee20abb

drivers/spi/spi-imx.c

+2 −15
Original line number Diff line number Diff line
@@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, 
{

	struct spi_imx_data *spi_imx = spi_master_get_devdata(master);



	if (spi_imx->dma_is_inited &&

	    transfer->len > spi_imx->wml * sizeof(u32))

	if (spi_imx->dma_is_inited && transfer->len >= spi_imx->wml &&

	    (transfer->len % spi_imx->wml) == 0)

		return true;

	return false;

}
@@ -919,8 +919,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, 
	struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL;

	int ret;

	unsigned long timeout;

	u32 dma;

	int left;

	struct spi_master *master = spi_imx->bitbang.master;

	struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg;
@@ -954,13 +952,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, 
	/* Trigger the cspi module. */

	spi_imx->dma_finished = 0;



	dma = readl(spi_imx->base + MX51_ECSPI_DMA);

	dma = dma & (~MX51_ECSPI_DMA_RXT_WML_MASK);

	/* Change RX_DMA_LENGTH trigger dma fetch tail data */

	left = transfer->len % spi_imx->wml;

	if (left)

		writel(dma | (left << MX51_ECSPI_DMA_RXT_WML_OFFSET),

				spi_imx->base + MX51_ECSPI_DMA);

	/*

	 * Set these order to avoid potential RX overflow. The overflow may

	 * happen if we enable SPI HW before starting RX DMA due to rescheduling
@@ -992,10 +983,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, 
			spi_imx->devtype_data->reset(spi_imx);

			dmaengine_terminate_all(master->dma_rx);

		}

		dma &= ~MX51_ECSPI_DMA_RXT_WML_MASK;

		writel(dma |

		       spi_imx->wml << MX51_ECSPI_DMA_RXT_WML_OFFSET,

		       spi_imx->base + MX51_ECSPI_DMA);

	}



	spi_imx->dma_finished = 1;

drivers/spi/spi-rockchip.c

+3 −0
Original line number Diff line number Diff line
@@ -749,6 +749,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) 
	return 0;



err_register_master:

	pm_runtime_disable(&pdev->dev);

	if (rs->dma_tx.ch)

		dma_release_channel(rs->dma_tx.ch);

	if (rs->dma_rx.ch)
@@ -778,6 +779,8 @@ static int rockchip_spi_remove(struct platform_device *pdev) 
	if (rs->dma_rx.ch)

		dma_release_channel(rs->dma_rx.ch);



	spi_master_put(master);



	return 0;

}

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