[MIPS] MTX1: add idsel cardbus ressources (baa545fd) · Commits · 戴 / test

arch/mips/au1000/mtx-1/board_setup.c

+29 −0

Original line number	Diff line number	Diff line
		@@ -43,6 +43,9 @@
		#include <asm/pgtable.h>
		#include <asm/mach-au1x00/au1000.h>

		extern int (*board_pci_idsel)(unsigned int devsel, int assert);
		int mtx1_pci_idsel(unsigned int devsel, int assert);

		void board_reset (void)
		{
		/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
		@@ -72,11 +75,37 @@ void __init board_setup(void)
		au_writel( 0xFFFFFFFF, SYS_TRIOUTCLR );
		au_writel( 0x00000001, SYS_OUTPUTCLR ); // set M66EN (PCI 66MHz) to OFF
		au_writel( 0x00000008, SYS_OUTPUTSET ); // set PCI CLKRUN# to OFF
		au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON
		au_writel( 0x00000020, SYS_OUTPUTCLR ); // set eth PHY TX_ER to OFF

		// enable LED and set it to green
		au_writel( au_readl(GPIO2_DIR) \| 0x1800, GPIO2_DIR );
		au_writel( 0x18000800, GPIO2_OUTPUT );

		board_pci_idsel = mtx1_pci_idsel;

		printk("4G Systems MTX-1 Board\n");
		}

		int
		mtx1_pci_idsel(unsigned int devsel, int assert)
		{
		#define MTX_IDSEL_ONLY_0_AND_3 0
		#if MTX_IDSEL_ONLY_0_AND_3
		if (devsel != 0 && devsel != 3) {
		printk("*** not 0 or 3\n");
		return 0;
		}
		#endif

		if (assert && devsel != 0) {
		// supress signal to cardbus
		au_writel( 0x00000002, SYS_OUTPUTCLR ); // set EXT_IO3 OFF
		}
		else {
		au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON
		}
		au_sync_udelay(1);
		return 1;
		}

+1 −1

Original line number	Diff line number	Diff line
		@@ -48,7 +48,7 @@
		#include <asm/mach-au1x00/au1000.h>

		char irq_tab_alchemy[][5] __initdata = {
		[0] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */
		[0] = { -1, INTA, INTA, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */
		[1] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
		[2] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 02 - AdapterB-Slot0 (top) */
		[3] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 03 - AdapterB-Slot1 (bottom) */