Commit ba0e1fa9 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'integrator/multiplatform-base' into next/cleanup2 

* integrator/multiplatform-base:
  ARM: integrator: select GPIO block
  ARM: integrator: register the IM-PD1 VIC
  ARM: integrator: use managed resources for the IM-PD1
  irqchip: support cascaded VICs
  irqchip: vic: update the base IRQ member correctly
  clk: versatile: respect parent rate in ICST clock
  clk: versatile: pass a parent to the ICST clock
  ARM: integrator: switch to fetch clocks from device tree
  ARM: SP804: make Integrator/CP timer pick clock from DT
  ARM: integrator: define clocks in the device trees
parents cfbf8d48 29525484

Documentation/devicetree/bindings/clock/arm-integrator.txt

0 → 100644
+34 −0
Original line number Diff line number Diff line 
Clock bindings for ARM Integrator Core Module clocks



Auxilary Oscillator Clock



This is a configurable clock fed from a 24 MHz chrystal,

used for generating e.g. video clocks. It is located on the

core module and there is only one of these.



This clock node *must* be a subnode of the core module, since

it obtains the base address for it's address range from its

parent node.





Required properties:

- compatible: must be "arm,integrator-cm-auxosc"

- #clock-cells: must be <0>



Optional properties:

- clocks: parent clock(s)



Example:



core-module@10000000 {

	xtal24mhz: xtal24mhz@24M {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <24000000>;

	};

	auxosc: cm_aux_osc@25M {

		#clock-cells = <0>;

		compatible = "arm,integrator-cm-auxosc";

		clocks = <&xtal24mhz>;

	};

};

arch/arm/boot/dts/integratorap.dts

+35 −0
Original line number Diff line number Diff line
@@ -18,6 +18,28 @@ 
		bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";

	};



	/* 24 MHz chrystal on the core module */

	xtal24mhz: xtal24mhz@24M {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <24000000>;

	};



	pclk: pclk@0 {

		#clock-cells = <0>;

		compatible = "fixed-factor-clock";

		clock-div = <1>;

		clock-mult = <1>;

		clocks = <&xtal24mhz>;

	};



	/* The UART clock is 14.74 MHz divided by an ICS525 */

	uartclk: uartclk@14.74M {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <14745600>;

	};



	syscon {

		compatible = "arm,integrator-ap-syscon";

		reg = <0x11000000 0x100>;
@@ -28,14 +50,17 @@ 


	timer0: timer@13000000 {

		compatible = "arm,integrator-timer";

		clocks = <&xtal24mhz>;

	};



	timer1: timer@13000100 {

		compatible = "arm,integrator-timer";

		clocks = <&xtal24mhz>;

	};



	timer2: timer@13000200 {

		compatible = "arm,integrator-timer";

		clocks = <&xtal24mhz>;

	};



	pic: pic@14000000 {
@@ -92,26 +117,36 @@ 
		rtc: rtc@15000000 {

			compatible = "arm,pl030", "arm,primecell";

			arm,primecell-periphid = <0x00041030>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		uart0: uart@16000000 {

			compatible = "arm,pl010", "arm,primecell";

			arm,primecell-periphid = <0x00041010>;

			clocks = <&uartclk>, <&pclk>;

			clock-names = "uartclk", "apb_pclk";

		};



		uart1: uart@17000000 {

			compatible = "arm,pl010", "arm,primecell";

			arm,primecell-periphid = <0x00041010>;

			clocks = <&uartclk>, <&pclk>;

			clock-names = "uartclk", "apb_pclk";

		};



		kmi0: kmi@18000000 {

			compatible = "arm,pl050", "arm,primecell";

			arm,primecell-periphid = <0x00041050>;

			clocks = <&xtal24mhz>, <&pclk>;

			clock-names = "KMIREFCLK", "apb_pclk";

		};



		kmi1: kmi@19000000 {

			compatible = "arm,pl050", "arm,primecell";

			arm,primecell-periphid = <0x00041050>;

			clocks = <&xtal24mhz>, <&pclk>;

			clock-names = "KMIREFCLK", "apb_pclk";

		};

	};

};

arch/arm/boot/dts/integratorcp.dts

+100 −2
Original line number Diff line number Diff line
@@ -13,25 +13,107 @@ 
		bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";

	};



	/*

	 * The Integrator/CP overall clocking architecture can be found in

	 * ARM DUI 0184B page 7-28 "Integrator/CP922T system clocks" which

	 * appear to illustrate the layout used in most configurations.

	 */



	/* The codec chrystal operates at 24.576 MHz */

	xtal_codec: xtal24.576@24.576M {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <24576000>;

	};



	/* The chrystal is divided by 2 by the codec for the AACI bit clock */

	aaci_bitclk: aaci_bitclk@12.288M {

		#clock-cells = <0>;

		compatible = "fixed-factor-clock";

		clock-div = <2>;

		clock-mult = <1>;

		clocks = <&xtal_codec>;

	};



	/* This is a 25MHz chrystal on the base board */

	xtal25mhz: xtal25mhz@25M {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <25000000>;

	};



	/* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */

	uartclk: uartclk@14.74M {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <14745600>;

	};



	/* Actually sysclk I think */

	pclk: pclk@0 {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <0>;

	};



	core-module@10000000 {

		/* 24 MHz chrystal on the core module */

		xtal24mhz: xtal24mhz@24M {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <24000000>;

		};



		/*

		 * External oscillator on the core module, usually used

		 * to drive video circuitry. Driven from the 24MHz clock.

		 */

		auxosc: cm_aux_osc@25M {

			#clock-cells = <0>;

			compatible = "arm,integrator-cm-auxosc";

			clocks = <&xtal24mhz>;

		};



		/* The KMI clock is the 24 MHz oscillator divided to 8MHz */

		kmiclk: kmiclk@1M {

			#clock-cells = <0>;

			compatible = "fixed-factor-clock";

			clock-div = <3>;

			clock-mult = <1>;

			clocks = <&xtal24mhz>;

		};



		/* The timer clock is the 24 MHz oscillator divided to 1MHz */

		timclk: timclk@1M {

			#clock-cells = <0>;

			compatible = "fixed-factor-clock";

			clock-div = <24>;

			clock-mult = <1>;

			clocks = <&xtal24mhz>;

		};

	};



	syscon {

		compatible = "arm,integrator-cp-syscon";

		reg = <0xcb000000 0x100>;

	};



	timer0: timer@13000000 {

		/* TIMER0 runs @ 25MHz */

		/* TIMER0 runs directly on the 25MHz chrystal */

		compatible = "arm,integrator-cp-timer";

		status = "disabled";

		clocks = <&xtal25mhz>;

	};



	timer1: timer@13000100 {

		/* TIMER1 runs @ 1MHz */

		compatible = "arm,integrator-cp-timer";

		clocks = <&timclk>;

	};



	timer2: timer@13000200 {

		/* TIMER2 runs @ 1MHz */

		compatible = "arm,integrator-cp-timer";

		clocks = <&timclk>;

	};



	pic: pic@14000000 {
@@ -74,22 +156,32 @@ 
		 */

		rtc@15000000 {

			compatible = "arm,pl031", "arm,primecell";

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		uart@16000000 {

			compatible = "arm,pl011", "arm,primecell";

			clocks = <&uartclk>, <&pclk>;

			clock-names = "uartclk", "apb_pclk";

		};



		uart@17000000 {

			compatible = "arm,pl011", "arm,primecell";

			clocks = <&uartclk>, <&pclk>;

			clock-names = "uartclk", "apb_pclk";

		};



		kmi@18000000 {

			compatible = "arm,pl050", "arm,primecell";

			clocks = <&kmiclk>, <&pclk>;

			clock-names = "KMIREFCLK", "apb_pclk";

		};



		kmi@19000000 {

			compatible = "arm,pl050", "arm,primecell";

			clocks = <&kmiclk>, <&pclk>;

			clock-names = "KMIREFCLK", "apb_pclk";

		};



		/*
@@ -100,18 +192,24 @@ 
			reg = <0x1c000000 0x1000>;

			interrupts = <23 24>;

			max-frequency = <515633>;

			clocks = <&uartclk>, <&pclk>;

			clock-names = "mclk", "apb_pclk";

		};



		aaci@1d000000 {

			compatible = "arm,pl041", "arm,primecell";

			reg = <0x1d000000 0x1000>;

			interrupts = <25>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		clcd@c0000000 {

			compatible = "arm,pl110", "arm,primecell";

			reg = <0xC0000000 0x1000>;

			interrupts = <22>;

			clocks = <&auxosc>, <&pclk>;

			clock-names = "clcd", "apb_pclk";

		};

	};

};

arch/arm/common/timer-sp.c

+6 −2
Original line number Diff line number Diff line
@@ -271,10 +271,14 @@ static void __init integrator_cp_of_init(struct device_node *np) 
	void __iomem *base;

	int irq;

	const char *name = of_get_property(np, "compatible", NULL);

	struct clk *clk;



	base = of_iomap(np, 0);

	if (WARN_ON(!base))

		return;

	clk = of_clk_get(np, 0);

	if (WARN_ON(IS_ERR(clk)))

		return;



	/* Ensure timer is disabled */

	writel(0, base + TIMER_CTRL);
@@ -283,13 +287,13 @@ static void __init integrator_cp_of_init(struct device_node *np) 
		goto err;



	if (!init_count)

		sp804_clocksource_init(base, name);

		__sp804_clocksource_and_sched_clock_init(base, name, clk, 0);

	else {

		irq = irq_of_parse_and_map(np, 0);

		if (irq <= 0)

			goto err;



		sp804_clockevents_init(base, irq, name);

		__sp804_clockevents_init(base, irq, clk, name);

	}



	init_count++;

arch/arm/mach-integrator/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -30,6 +30,9 @@ config ARCH_CINTEGRATOR 
config INTEGRATOR_IMPD1

	tristate "Include support for Integrator/IM-PD1"

	depends on ARCH_INTEGRATOR_AP

	select ARCH_REQUIRE_GPIOLIB

	select ARM_VIC

	select GPIO_PL061 if GPIOLIB

	help

	  The IM-PD1 is an add-on logic module for the Integrator which

	  allows ARM(R) Ltd PrimeCells to be developed and evaluated.

CRA Git | Maintained and supported by SUSTech CRA and CCSE