Commit ba09f5d8 authored by Takashi Iwai's avatar Takashi Iwai
Browse files

ALSA: cs46xx: More constifications 

Apply const prefix to each possible place: the static tables for
registers and op codes, etc.

Just for minor optimization and no functional changes.

Link: https://lore.kernel.org/r/20200105144823.29547-30-tiwai@suse.de


Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent a7f7edcf

sound/pci/cs46xx/cs46xx_lib.c

+1 −1
Original line number Diff line number Diff line
@@ -3745,7 +3745,7 @@ static struct cs_card_type cards[] = { 
 * APM support

 */

#ifdef CONFIG_PM_SLEEP

static unsigned int saved_regs[] = {

static const unsigned int saved_regs[] = {

	BA0_ACOSV,

	/*BA0_ASER_FADDR,*/

	BA0_ASER_MASTER,

sound/pci/cs46xx/dsp_spos.c

+2 −2
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ 
static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,

				  struct dsp_scb_descriptor * fg_entry);



static enum wide_opcode wide_opcodes[] = { 

static const enum wide_opcode wide_opcodes[] = {

	WIDE_FOR_BEGIN_LOOP,

	WIDE_FOR_BEGIN_LOOP2,

	WIDE_COND_GOTO_ADDR,
@@ -1038,7 +1038,7 @@ int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip) 
	

	int fifo_addr, fifo_span, valid_slots;



	static struct dsp_spos_control_block sposcb = {

	static const struct dsp_spos_control_block sposcb = {

		/* 0 */ HFG_TREE_SCB,HFG_STACK,

		/* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,

		/* 2 */ DSP_SPOS_DC,0,

sound/pci/cs46xx/dsp_spos_scb_lib.c

+3 −3
Original line number Diff line number Diff line
@@ -1145,7 +1145,7 @@ find_next_free_scb (struct snd_cs46xx * chip, struct dsp_scb_descriptor * from) 
	return scb;

}



static u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = {

static const u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = {

	0x0600, /* 1 */

	0x1500, /* 2 */

	0x1580, /* 3 */
@@ -1180,7 +1180,7 @@ static u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = { 
	0x2400, /* 32 */

};



static u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = {

static const u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = {

	0x2B80,

	0x2BA0,

	0x2BC0,
@@ -1197,7 +1197,7 @@ static u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = { 
	0x2E20

};



static u32 src_delay_buffer_addr[DSP_MAX_SRC_NR] = {

static const u32 src_delay_buffer_addr[DSP_MAX_SRC_NR] = {

	0x2480,

	0x2500,

	0x2580,

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