Commit b9fcf491 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/dwc' 

  - Simplify computation of msix_tbl (Jiri Slaby)

  - Make hisi_pcie_platform_ops static (Zou Wei)

  - Warn about resources above 4G (Alan Mikhak)

  - Make intel_pcie_cpu_addr() static (Jason Yan)

  - Use devm_platform_ioremap_resource_byname() to simplify code and
    improve error checking (Wei Yongjun)

  - Fix inner MSI IRQ domain registration so it doesn't confuse debugfs
    (Marc Zyngier)

  - Don't use FAST_LINK_MODE on meson (Marc Zyngier)

  - Add Socionext UniPhier Pro5 PCIe endpoint controller driver and DT
    description (Kunihiko Hayashi)

* remotes/lorenzo/pci/dwc:
  PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver
  dt-bindings: PCI: Add UniPhier PCIe endpoint controller description
  PCI: dwc: Use private data pointer of "struct irq_domain" to get pcie_port
  PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link
  PCI: dwc: Fix inner MSI IRQ domain registration
  PCI: dwc: pci-dra7xx: Use devm_platform_ioremap_resource_byname()
  PCI: dwc: intel: Make intel_pcie_cpu_addr() static
  PCI: dwc: Program outbound ATU upper limit register
  PCI: dwc: Make hisi_pcie_platform_ops static
  PCI: dwc: Clean up computing of msix_tbl
parents 71287951 8d7e33d6

Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml

0 → 100644
+92 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Socionext UniPhier PCIe endpoint controller



description: |

  UniPhier PCIe endpoint controller is based on the Synopsys DesignWare

  PCI core. It shares common features with the PCIe DesignWare core and

  inherits common properties defined in

  Documentation/devicetree/bindings/pci/designware-pcie.txt.



maintainers:

  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>



allOf:

  - $ref: "pci-ep.yaml#"



properties:

  compatible:

    const: socionext,uniphier-pro5-pcie-ep



  reg:

    maxItems: 4



  reg-names:

    items:

      - const: dbi

      - const: dbi2

      - const: link

      - const: addr_space



  clocks:

    maxItems: 2



  clock-names:

    items:

      - const: gio

      - const: link



  resets:

    maxItems: 2



  reset-names:

    items:

      - const: gio

      - const: link



  num-ib-windows:

    const: 16



  num-ob-windows:

    const: 16



  num-lanes: true



  phys:

    maxItems: 1



  phy-names:

    const: pcie-phy



required:

  - compatible

  - reg

  - reg-names

  - clocks

  - clock-names

  - resets

  - reset-names



additionalProperties: false



examples:

  - |

    pcie_ep: pcie-ep@66000000 {

        compatible = "socionext,uniphier-pro5-pcie-ep";

        reg-names = "dbi", "dbi2", "link", "addr_space";

        reg = <0x66000000 0x1000>, <0x66001000 0x1000>,

              <0x66010000 0x10000>, <0x67000000 0x400000>;

        clock-names = "gio", "link";

        clocks = <&sys_clk 12>, <&sys_clk 24>;

        reset-names = "gio", "link";

        resets = <&sys_rst 12>, <&sys_rst 24>;

        num-ib-windows = <16>;

        num-ob-windows = <16>;

        num-lanes = <4>;

        phy-names = "pcie-phy";

        phys = <&pcie_phy>;

    };

MAINTAINERS

+2 −2
Original line number Diff line number Diff line
@@ -13142,8 +13142,8 @@ PCIE DRIVER FOR SOCIONEXT UNIPHIER 
M:	Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

L:	linux-pci@vger.kernel.org

S:	Maintained

F:	Documentation/devicetree/bindings/pci/uniphier-pcie.txt

F:	drivers/pci/controller/dwc/pcie-uniphier.c

F:	Documentation/devicetree/bindings/pci/uniphier-pcie*

F:	drivers/pci/controller/dwc/pcie-uniphier*















PCIE DRIVER FOR ST SPEAR13XX















M:	Pratyush Anand <pratyush.anand@gmail.com>

































drivers/pci/controller/dwc/Kconfig



+12
−2






























Original line number
Diff line number
Diff line








@@ -280,15 +280,25 @@ config PCIE_TEGRA194_EP













	  selected. This uses the DesignWare core.































config PCIE_UNIPHIER













	bool "Socionext UniPhier PCIe controllers"













	bool "Socionext UniPhier PCIe host controllers"















	depends on ARCH_UNIPHIER || COMPILE_TEST















	depends on OF && HAS_IOMEM















	depends on PCI_MSI_IRQ_DOMAIN















	select PCIE_DW_HOST















	help













	  Say Y here if you want PCIe controller support on UniPhier SoCs.













	  Say Y here if you want PCIe host controller support on UniPhier SoCs.















	  This driver supports LD20 and PXs3 SoCs.





























config PCIE_UNIPHIER_EP













	bool "Socionext UniPhier PCIe endpoint controllers"













	depends on ARCH_UNIPHIER || COMPILE_TEST













	depends on OF && HAS_IOMEM













	depends on PCI_ENDPOINT













	select PCIE_DW_EP













	help













	  Say Y here if you want PCIe endpoint controller support on













	  UniPhier SoCs. This driver supports Pro5 SoC.





























config PCIE_AL















	bool "Amazon Annapurna Labs PCIe controller"















	depends on OF && (ARM64 || COMPILE_TEST)

































drivers/pci/controller/dwc/Makefile



+1
−0






























Original line number
Diff line number
Diff line








@@ -19,6 +19,7 @@ obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o













obj-$(CONFIG_PCI_MESON) += pci-meson.o















obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o















obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o













obj-$(CONFIG_PCIE_UNIPHIER_EP) += pcie-uniphier-ep.o































# The following drivers are for devices that use the generic ACPI















# pci_root.c driver but don't support standard ECAM config access.

































drivers/pci/controller/dwc/pci-dra7xx.c



+3
−5






























Original line number
Diff line number
Diff line








@@ -840,7 +840,6 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev)













	struct phy **phy;















	struct device_link **link;















	void __iomem *base;













	struct resource *res;















	struct dw_pcie *pci;















	struct dra7xx_pcie *dra7xx;















	struct device *dev = &pdev->dev;










@@ -877,10 +876,9 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev)













		return irq;















	}





























	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ti_conf");













	base = devm_ioremap(dev, res->start, resource_size(res));













	if (!base)













		return -ENOMEM;













	base = devm_platform_ioremap_resource_byname(pdev, "ti_conf");













	if (IS_ERR(base))













		return PTR_ERR(base);































	phy_count = of_property_count_strings(np, "phy-names");















	if (phy_count < 0) {









































































CRA Git | Maintained and supported by SUSTech CRA and CCSE