Commit b9f1246d authored by Noah Abradjian's avatar Noah Abradjian Committed by Alex Deucher
Browse files

drm/amd/display: Collapse resource arrays when pipe is disabled 



[Why]
Currently, pipe resources are assigned to an index that matches the pipe position.
However, if pipe 1 or 2 is disabled, there will be a gap in the arrays which causes a crash when iterating based on pipe_count.

[How]
Fix resource construct to assign resources to minimum available array index.

Signed-off-by: default avatarNoah Abradjian <noah.abradjian@amd.com>
Reviewed-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cf27a6d1

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

+10 −10
Original line number Diff line number Diff line
@@ -1783,41 +1783,41 @@ static bool dcn21_resource_construct( 
		if ((pipe_fuses & (1 << i)) != 0)

			continue;



		pool->base.hubps[i] = dcn21_hubp_create(ctx, i);

		if (pool->base.hubps[i] == NULL) {

		pool->base.hubps[j] = dcn21_hubp_create(ctx, i);

		if (pool->base.hubps[j] == NULL) {

			BREAK_TO_DEBUGGER();

			dm_error(

				"DC: failed to create memory input!\n");

			goto create_fail;

		}



		pool->base.ipps[i] = dcn21_ipp_create(ctx, i);

		if (pool->base.ipps[i] == NULL) {

		pool->base.ipps[j] = dcn21_ipp_create(ctx, i);

		if (pool->base.ipps[j] == NULL) {

			BREAK_TO_DEBUGGER();

			dm_error(

				"DC: failed to create input pixel processor!\n");

			goto create_fail;

		}



		pool->base.dpps[i] = dcn21_dpp_create(ctx, i);

		if (pool->base.dpps[i] == NULL) {

		pool->base.dpps[j] = dcn21_dpp_create(ctx, i);

		if (pool->base.dpps[j] == NULL) {

			BREAK_TO_DEBUGGER();

			dm_error(

				"DC: failed to create dpps!\n");

			goto create_fail;

		}



		pool->base.opps[i] = dcn21_opp_create(ctx, i);

		if (pool->base.opps[i] == NULL) {

		pool->base.opps[j] = dcn21_opp_create(ctx, i);

		if (pool->base.opps[j] == NULL) {

			BREAK_TO_DEBUGGER();

			dm_error(

				"DC: failed to create output pixel processor!\n");

			goto create_fail;

		}



		pool->base.timing_generators[i] = dcn21_timing_generator_create(

		pool->base.timing_generators[j] = dcn21_timing_generator_create(

				ctx, i);

		if (pool->base.timing_generators[i] == NULL) {

		if (pool->base.timing_generators[j] == NULL) {

			BREAK_TO_DEBUGGER();

			dm_error("DC: failed to create tg!\n");

			goto create_fail;

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