Commit b9d5868e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux into next/cleanup 

From Maxime Ripard:
Cleanups for Allwinner sunXi architecture:
  - Remove sunxi.dtsi
  - Switch to clocksource/irqchip device tree handlers
  - Cleanup the watchdog code

* tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux

:
  ARM: sunxi: Rework the restart code
  irqchip: sunxi: Rename sunxi to sun4i
  irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
  clocksource: sunxi: Rename sunxi to sun4i
  clocksource: sunxi: make use of CLKSRC_OF
  clocksource: sunxi: Cleanup the timer code
  clocksource: make CLOCKSOURCE_OF_DECLARE type safe

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>

Add/change conflict in drivers/clocksource/Makefile resolved.
parents 83c15f4c bc34b5f2

Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-ic.txt→Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt

+2 −2
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ Allwinner Sunxi Interrupt Controller 


Required properties:



- compatible : should be "allwinner,sunxi-ic"

- compatible : should be "allwinner,sun4i-ic"

- reg : Specifies base physical address and size of the registers.

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode an
@@ -97,7 +97,7 @@ The interrupt sources are as follows: 
Example:



intc: interrupt-controller {

	compatible = "allwinner,sunxi-ic";

	compatible = "allwinner,sun4i-ic";

	reg = <0x01c20400 0x400>;

	interrupt-controller;

	#interrupt-cells = <2>;

Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt→Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt

+2 −2
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ Allwinner A1X SoCs Timer Controller 


Required properties:



- compatible : should be "allwinner,sunxi-timer"

- compatible : should be "allwinner,sun4i-timer"

- reg : Specifies base physical address and size of the registers.

- interrupts : The interrupt of the first timer

- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
@@ -10,7 +10,7 @@ Required properties: 
Example:



timer {

	compatible = "allwinner,sunxi-timer";

	compatible = "allwinner,sun4i-timer";

	reg = <0x01c20c00 0x400>;

	interrupts = <22>;

	clocks = <&osc>;

Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt→Documentation/devicetree/bindings/watchdog/sun4i-wdt.txt

+3 −3
Original line number Diff line number Diff line 
Allwinner sunXi Watchdog timer

Allwinner sun4i Watchdog timer



Required properties:



- compatible : should be "allwinner,sunxi-wdt"

- compatible : should be "allwinner,sun4i-wdt"

- reg : Specifies base physical address and size of the registers.



Example:



wdt: watchdog@01c20c90 {

	compatible = "allwinner,sunxi-wdt";

	compatible = "allwinner,sun4i-wdt";

	reg = <0x01c20c90 0x10>;

};

arch/arm/mach-sunxi/Kconfig

+3 −2
Original line number Diff line number Diff line 
config ARCH_SUNXI

	bool "Allwinner A1X SOCs" if ARCH_MULTI_V7

	select CLKSRC_MMIO

	select CLKSRC_OF

	select COMMON_CLK

	select GENERIC_CLOCKEVENTS

	select GENERIC_IRQ_CHIP

	select PINCTRL

	select SPARSE_IRQ

	select SUNXI_TIMER

	select SUN4I_TIMER

	select PINCTRL_SUNXI

arch/arm/mach-sunxi/sunxi.c

+46 −28
Original line number Diff line number Diff line
@@ -10,61 +10,75 @@ 
 * warranty of any kind, whether express or implied.

 */



#include <linux/clocksource.h>

#include <linux/delay.h>

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/irqchip.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>

#include <linux/of_platform.h>

#include <linux/io.h>

#include <linux/sunxi_timer.h>



#include <linux/irqchip/sunxi.h>

#include <linux/clk/sunxi.h>



#include <asm/mach/arch.h>

#include <asm/mach/map.h>

#include <asm/system_misc.h>



#include "sunxi.h"



#define WATCHDOG_CTRL_REG	0x00

#define WATCHDOG_CTRL_RESTART		(1 << 0)

#define WATCHDOG_MODE_REG	0x04

#define WATCHDOG_MODE_ENABLE		(1 << 0)

#define WATCHDOG_MODE_RESET_ENABLE	(1 << 1)

#define SUN4I_WATCHDOG_CTRL_REG		0x00

#define SUN4I_WATCHDOG_CTRL_RESTART		(1 << 0)

#define SUN4I_WATCHDOG_MODE_REG		0x04

#define SUN4I_WATCHDOG_MODE_ENABLE		(1 << 0)

#define SUN4I_WATCHDOG_MODE_RESET_ENABLE	(1 << 1)



static void __iomem *wdt_base;



static void sunxi_setup_restart(void)

{

	struct device_node *np = of_find_compatible_node(NULL, NULL,

						"allwinner,sunxi-wdt");

	if (WARN(!np, "unable to setup watchdog restart"))

		return;



	wdt_base = of_iomap(np, 0);

	WARN(!wdt_base, "failed to map watchdog base address");

}



static void sunxi_restart(char mode, const char *cmd)

static void sun4i_restart(char mode, const char *cmd)

{

	if (!wdt_base)

		return;



	/* Enable timer and set reset bit in the watchdog */

	writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE,

		wdt_base + WATCHDOG_MODE_REG);

	writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,

	       wdt_base + SUN4I_WATCHDOG_MODE_REG);



	/*

	 * Restart the watchdog. The default (and lowest) interval

	 * value for the watchdog is 0.5s.

	 */

	writel(WATCHDOG_CTRL_RESTART, wdt_base + WATCHDOG_CTRL_REG);

	writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);



	while (1) {

		mdelay(5);

		writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE,

			wdt_base + WATCHDOG_MODE_REG);

		writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,

		       wdt_base + SUN4I_WATCHDOG_MODE_REG);

	}

}



static struct of_device_id sunxi_restart_ids[] = {

	{ .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },

	{ /*sentinel*/ }

};



static void sunxi_setup_restart(void)

{

	const struct of_device_id *of_id;

	struct device_node *np;



	np = of_find_matching_node(NULL, sunxi_restart_ids);

	if (WARN(!np, "unable to setup watchdog restart"))

		return;



	wdt_base = of_iomap(np, 0);

	WARN(!wdt_base, "failed to map watchdog base address");



	of_id = of_match_node(sunxi_restart_ids, np);

	WARN(!of_id, "restart function not available");



	arm_pm_restart = of_id->data;

}



static struct map_desc sunxi_io_desc[] __initdata = {
@@ -81,6 +95,12 @@ void __init sunxi_map_io(void) 
	iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));

}



static void __init sunxi_timer_init(void)

{

	sunxi_init_clocks();

	clocksource_of_init();

}



static void __init sunxi_dt_init(void)

{

	sunxi_setup_restart();
@@ -97,9 +117,7 @@ static const char * const sunxi_board_dt_compat[] = { 
DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")

	.init_machine	= sunxi_dt_init,

	.map_io		= sunxi_map_io,

	.init_irq	= sunxi_init_irq,

	.handle_irq	= sunxi_handle_irq,

	.restart	= sunxi_restart,

	.init_time	= &sunxi_timer_init,

	.init_irq	= irqchip_init,

	.init_time	= sunxi_timer_init,

	.dt_compat	= sunxi_board_dt_compat,

MACHINE_END

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