Commit b9d16a2a authored Apr 27, 2015 by Aravind Gopalakrishnan Committed by Ingo Molnar May 06, 2015

x86/cpu/amd: Set X86_FEATURE_EXTD_APICID for future processors



Decision to use a 4-bit mask or 8-bit mask in default_get_apic_id()
is controlled by setting capability bit X86_FEATURE_EXTD_APICID.

Currently, we detect extended APIC ID support by accessing Link
Transaction Control register D18F0x68 in PCI config space.

But, not even that is needed as we can safely postulate that future
AMD processors will support 8-bit APIC IDs and we can simply set that
feature bit on them, without the PCI access.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jacob Shin <jacob.w.shin@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: dave.hansen@linux.intel.com
Cc: hecmargi@upv.es
Cc: mgorman@suse.de
Link: http://lkml.kernel.org/r/1430148351-9013-1-git-send-email-Aravind.Gopalakrishnan@amd.com


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent 1b457429

arch/x86/kernel/cpu/amd.c

+10 −2

Original line number	Diff line number	Diff line
		@@ -520,8 +520,16 @@ static void early_init_amd(struct cpuinfo_x86 *c)
		set_cpu_cap(c, X86_FEATURE_K6_MTRR);
		#endif
		#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_PCI)
		/*
		* ApicID can always be treated as an 8-bit value for AMD APIC versions
		* >= 0x10, but even old K8s came out of reset with version 0x10. So, we
		* can safely set X86_FEATURE_EXTD_APICID unconditionally for families
		* after 16h.
		*/
		if (cpu_has_apic && c->x86 > 0x16) {
		set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
		} else if (cpu_has_apic && c->x86 >= 0xf) {
		/* check CPU config space for extended APIC ID */
		if (cpu_has_apic && c->x86 >= 0xf) {
		unsigned int val;
		val = read_pci_config(0, 24, 0, 0x68);
		if ((val & ((1 << 17) \| (1 << 18))) == ((1 << 17) \| (1 << 18)))

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