Commit b9ca5fad authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915/skl: Provide a get_aux_send_ctl() vfunc for skylake 



Skylake doesn't use the pre-charge field now, but, instead, we need to
specify the total number of SYNC pulses for the SYNC phase (pre-charge +
SYNC pattern pules). Let's use the default value (32) for that.

v3: increase DP AUX TX timeout as 400us is not to be used on SKL
    apparently (Jesse).

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b6b5e383

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -3634,6 +3634,7 @@ enum punit_power_well { 
#define   DP_AUX_CH_CTL_PRECHARGE_TEST	    (1 << 11)

#define   DP_AUX_CH_CTL_BIT_CLOCK_2X_MASK    (0x7ff)

#define   DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT   0

#define   DP_AUX_CH_CTL_SYNC_PULSE_SKL(c)   ((c) - 1)



/*

 * Computing GMCH M and N values for the Display Port link

drivers/gpu/drm/i915/intel_dp.c

+19 −1
Original line number Diff line number Diff line
@@ -701,6 +701,21 @@ static uint32_t i9xx_get_aux_send_ctl(struct intel_dp *intel_dp, 
	       (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT);

}



static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,

				      bool has_aux_irq,

				      int send_bytes,

				      uint32_t unused)

{

	return DP_AUX_CH_CTL_SEND_BUSY |

	       DP_AUX_CH_CTL_DONE |

	       (has_aux_irq ? DP_AUX_CH_CTL_INTERRUPT : 0) |

	       DP_AUX_CH_CTL_TIME_OUT_ERROR |

	       DP_AUX_CH_CTL_TIME_OUT_1600us |

	       DP_AUX_CH_CTL_RECEIVE_ERROR |

	       (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |

	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);

}



static int

intel_dp_aux_ch(struct intel_dp *intel_dp,

		uint8_t *send, int send_bytes,
@@ -5104,6 +5119,9 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, 
	else

		intel_dp->get_aux_clock_divider = i9xx_get_aux_clock_divider;



	if (INTEL_INFO(dev)->gen >= 9)

		intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl;

	else

		intel_dp->get_aux_send_ctl = i9xx_get_aux_send_ctl;



	/* Preserve the current hw state. */

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