arm64/prefetch: fix a -Wtype-limits warning (b99286b0) · Commits · 戴 / test

The commit ("arm64: prefetch: add alternative pattern for CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be used in has_no_hw_prefetch() with rv_min=0 which generates a compilation warning from GCC, In file included from ./arch/arm64/include/asm/cache.h:8, from ./include/linux/cache.h:6, from ./include/linux/printk.h:9, from ./include/linux/kernel.h:15, from ./include/linux/cpumask.h:10, from arch/arm64/kernel/cpufeature.c:11: arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of unsigned expression >= 0 is always true [-Wtype-limits] _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ ^~ arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro 'MIDR_IS_CPU_MODEL_RANGE' return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, ^~~~~~~~~~~~~~~~~~~~~~~ Fix it by converting MIDR_IS_CPU_MODEL_RANGE to a static inline function. Signed-off-by:

Qian Cai <cai@lca.pw> Signed-off-by:

Will Deacon <will@kernel.org>

arch/arm64/include/asm/cputype.h

+11 −10

Original line number	Diff line number	Diff line
		@@ -51,14 +51,6 @@
		#define MIDR_CPU_MODEL_MASK (MIDR_IMPLEMENTOR_MASK \| MIDR_PARTNUM_MASK \| \
		MIDR_ARCHITECTURE_MASK)

		#define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \
		({ \
		u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \
		u32 rv = (midr) & (MIDR_REVISION_MASK \| MIDR_VARIANT_MASK); \
		\
		_model == (model) && rv >= (rv_min) && rv <= (rv_max); \
		})

		#define ARM_CPU_IMP_ARM 0x41
		#define ARM_CPU_IMP_APM 0x50
		#define ARM_CPU_IMP_CAVIUM 0x43
		@@ -159,9 +151,18 @@ struct midr_range {
		#define MIDR_REV(m, v, r) MIDR_RANGE(m, v, r, v, r)
		#define MIDR_ALL_VERSIONS(m) MIDR_RANGE(m, 0, 0, 0xf, 0xf)

		static inline bool midr_is_cpu_model_range(u32 midr, u32 model, u32 rv_min,
		u32 rv_max)
		{
		u32 _model = midr & MIDR_CPU_MODEL_MASK;
		u32 rv = midr & (MIDR_REVISION_MASK \| MIDR_VARIANT_MASK);

		return _model == model && rv >= rv_min && rv <= rv_max;
		}

		static inline bool is_midr_in_range(u32 midr, struct midr_range const *range)
		{
		return MIDR_IS_CPU_MODEL_RANGE(midr, range->model,
		return midr_is_cpu_model_range(midr, range->model,
		range->rv_min, range->rv_max);
		}

arch/arm64/kernel/cpufeature.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -886,7 +886,7 @@ static bool has_no_hw_prefetch(const struct arm64_cpu_capabilities *entry, int _
		u32 midr = read_cpuid_id();

		/* Cavium ThunderX pass 1.x and 2.x */
		return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX,
		return midr_is_cpu_model_range(midr, MIDR_THUNDERX,
		MIDR_CPU_VAR_REV(0, 0),
		MIDR_CPU_VAR_REV(1, MIDR_REVISION_MASK));
		}

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