Commit b9585f53 authored by Andrew Murray's avatar Andrew Murray Committed by Will Deacon
Browse files

arm64: Advertise ARM64_HAS_DCPODP cpu feature 



Advertise ARM64_HAS_DCPODP when both DC CVAP and DC CVADP are supported.

Even though we don't use this feature now, we provide it for consistency
with DCPOP and anticipate it being used in the future.

Signed-off-by: default avatarAndrew Murray <andrew.murray@arm.com>
Reviewed-by: default avatarDave Martin <Dave.Martin@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 04a1438e

arch/arm64/include/asm/cpucaps.h

+2 −1
Original line number Diff line number Diff line
@@ -61,7 +61,8 @@ 
#define ARM64_HAS_GENERIC_AUTH_ARCH		40

#define ARM64_HAS_GENERIC_AUTH_IMP_DEF		41

#define ARM64_HAS_IRQ_PRIO_MASKING		42

#define ARM64_HAS_DCPODP			43



#define ARM64_NCAPS				43

#define ARM64_NCAPS				44



#endif /* __ASM_CPUCAPS_H */

arch/arm64/kernel/cpufeature.c

+10 −0
Original line number Diff line number Diff line
@@ -1340,6 +1340,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = { 
		.field_pos = ID_AA64ISAR1_DPB_SHIFT,

		.min_field_value = 1,

	},

	{

		.desc = "Data cache clean to Point of Deep Persistence",

		.capability = ARM64_HAS_DCPODP,

		.type = ARM64_CPUCAP_SYSTEM_FEATURE,

		.matches = has_cpuid_feature,

		.sys_reg = SYS_ID_AA64ISAR1_EL1,

		.sign = FTR_UNSIGNED,

		.field_pos = ID_AA64ISAR1_DPB_SHIFT,

		.min_field_value = 2,

	},

#endif

#ifdef CONFIG_ARM64_SVE

	{

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