Commit b9569a3c authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'stm32-dt-for-v5.3-1' of...

Merge tag 'stm32-dt-for-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.3, round 1

Highlights:
----------

MPU part:
 -Add stm32mp157a-avenger board support:
  This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
  , 1024MB of DDR3 and STPMIC1A pmic . Several connections are available on this boards:
  2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG, ethernet
  10/100/1000, WiFi 5 GHz & 2.4GHz, ...
 -Add STMFX support en stm32mp157c-ev1 and enable joystick connected on
  it.
 -Add I2S and SAI support on stm32mp157c.
 -Add and enable support of Vivante GPU on stm32mp157 ED1 and DK1 boards
  (EV1 and DK2 inherit of it).
 -Add camera support:
  -Add DCMI support on stm32mp157c SOC
  -Enabled OV5640 camera support on stm32mp157c-ev1 board
 -Enable hdmi bridge sii9022 & display controller on stm32mp157c-dk1
  board.

MCU part:
 -Add STMFX support en stm32746g-eval and enable connections on it:
  leds and joystick

* tag 'stm32-dt-for-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32

: (27 commits)
  ARM: dts: stm32: replace rgmii mode with rgmii-id on stm32mp15 boards
  ARM: dts: stm32: Add Avenger96 devicetree support based on STM32MP157A
  dt-bindings: arm: stm32: Document Avenger96 devicetree binding
  dt-bindings: arm: stm32: Convert STM32 SoC bindings to DT schema
  ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157
  ARM: dts: stm32: add sai id registers to stm32mp157c
  ARM: dts: stm32: add power supply of rm68200 on stm32mp157c-ev1
  ARM: dts: stm32: enable display on stm32mp157c-dk1 board
  ARM: dts: stm32: Add I2C 1 config for stm32mp157a-dk1
  ARM: dts: stm32: enable OV5640 camera on stm32mp157c-ev1 board
  ARM: dts: stm32: add DCMI pins to stm32mp157c
  ARM: dts: stm32: add DCMI camera interface support on stm32mp157c
  ARM: dts: stm32: enable Vivante GPU support on stm32mp157a-dk1 board
  ARM: dts: stm32: enable Vivante GPU support on stm32mp157c-ed1 board
  ARM: dts: stm32: Add Vivante GPU support on STM32MP157c
  ARM: dts: stm32: add i2s pins muxing on stm32mp157
  ARM: dts: stm32: add i2s support on stm32mp157c
  ARM: dts: stm32: add sai pins muxing on stm32mp157
  ARM: dts: stm32: add sai support on stm32mp157c
  ARM: dts: stm32: add jedec compatible for nor flash on stm32mp157c-ev1
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 4cb0f05d f65aaf8b
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+0 −10
Original line number Diff line number Diff line
STMicroelectronics STM32 Platforms Device Tree Bindings

Each device tree must specify which STM32 SoC it uses,
using one of the following compatible strings:

  st,stm32f429
  st,stm32f469
  st,stm32f746
  st,stm32h743
  st,stm32mp157
+31 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/stm32/stm32.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STMicroelectronics STM32 Platforms Device Tree Bindings

maintainers:
  - Alexandre Torgue <alexandre.torgue@st.com>

properties:
  compatible:
    oneOf:
      - items:
          - const: st,stm32f429

      - items:
          - const: st,stm32f469

      - items:
          - const: st,stm32f746

      - items:
          - const: st,stm32h743

      - items:
          - enum:
              - arrow,stm32mp157a-avenger96 # Avenger96
          - const: st,stm32mp157
...
+1 −0
Original line number Diff line number Diff line
@@ -976,6 +976,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
	stm32746g-eval.dtb \
	stm32h743i-eval.dtb \
	stm32h743i-disco.dtb \
	stm32mp157a-avenger96.dtb \
	stm32mp157a-dk1.dtb \
	stm32mp157c-dk2.dtb \
	stm32mp157c-ed1.dtb \
+66 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@
#include "stm32f746.dtsi"
#include "stm32f746-pinctrl.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "STMicroelectronics STM32746g-EVAL board";
@@ -69,9 +70,15 @@
			gpios = <&gpiof 10 1>;
			linux,default-trigger = "heartbeat";
		};
		orange {
			gpios = <&stmfx_pinctrl 17 1>;
		};
		red {
			gpios = <&gpiob 7 1>;
		};
		blue {
			gpios = <&stmfx_pinctrl 19 1>;
		};
	};

	gpio_keys {
@@ -86,6 +93,43 @@
		};
	};

	joystick {
		compatible = "gpio-keys";
		#size-cells = <0>;
		pinctrl-0 = <&joystick_pins>;
		pinctrl-names = "default";
		button-0 {
			label = "JoySel";
			linux,code = <KEY_ENTER>;
			interrupt-parent = <&stmfx_pinctrl>;
			interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
		};
		button-1 {
			label = "JoyDown";
			linux,code = <KEY_DOWN>;
			interrupt-parent = <&stmfx_pinctrl>;
			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
		};
		button-2 {
			label = "JoyLeft";
			linux,code = <KEY_LEFT>;
			interrupt-parent = <&stmfx_pinctrl>;
			interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
		};
		button-3 {
			label = "JoyRight";
			linux,code = <KEY_RIGHT>;
			interrupt-parent = <&stmfx_pinctrl>;
			interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
		};
		button-4 {
			label = "JoyUp";
			linux,code = <KEY_UP>;
			interrupt-parent = <&stmfx_pinctrl>;
			interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
		};
	};

	usbotg_hs_phy: usb-phy {
		#phy-cells = <0>;
		compatible = "usb-nop-xceiv";
@@ -115,6 +159,28 @@
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";

	stmfx: stmfx@42 {
		compatible = "st,stmfx-0300";
		reg = <0x42>;
		interrupts = <8 IRQ_TYPE_EDGE_RISING>;
		interrupt-parent = <&gpioi>;

		stmfx_pinctrl: stmfx-pin-controller {
			compatible = "st,stmfx-0300-pinctrl";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-ranges = <&stmfx_pinctrl 0 0 24>;

			joystick_pins: joystick {
				pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
				drive-push-pull;
				bias-pull-up;
			};
		};
	};
};

&rtc {
+246 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@
				st,bank-name = "GPIOA";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 0 16>;
				status = "disabled";
			};

			gpiob: gpio@50003000 {
@@ -38,6 +39,7 @@
				st,bank-name = "GPIOB";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 16 16>;
				status = "disabled";
			};

			gpioc: gpio@50004000 {
@@ -50,6 +52,7 @@
				st,bank-name = "GPIOC";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 32 16>;
				status = "disabled";
			};

			gpiod: gpio@50005000 {
@@ -62,6 +65,7 @@
				st,bank-name = "GPIOD";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 48 16>;
				status = "disabled";
			};

			gpioe: gpio@50006000 {
@@ -74,6 +78,7 @@
				st,bank-name = "GPIOE";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 64 16>;
				status = "disabled";
			};

			gpiof: gpio@50007000 {
@@ -86,6 +91,7 @@
				st,bank-name = "GPIOF";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 80 16>;
				status = "disabled";
			};

			gpiog: gpio@50008000 {
@@ -98,6 +104,7 @@
				st,bank-name = "GPIOG";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 96 16>;
				status = "disabled";
			};

			gpioh: gpio@50009000 {
@@ -110,6 +117,7 @@
				st,bank-name = "GPIOH";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 112 16>;
				status = "disabled";
			};

			gpioi: gpio@5000a000 {
@@ -122,6 +130,7 @@
				st,bank-name = "GPIOI";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 128 16>;
				status = "disabled";
			};

			gpioj: gpio@5000b000 {
@@ -134,6 +143,7 @@
				st,bank-name = "GPIOJ";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 144 16>;
				status = "disabled";
			};

			gpiok: gpio@5000c000 {
@@ -146,6 +156,7 @@
				st,bank-name = "GPIOK";
				ngpios = <8>;
				gpio-ranges = <&pinctrl 0 160 8>;
				status = "disabled";
			};

			cec_pins_a: cec-0 {
@@ -178,6 +189,47 @@
				};
			};

			dcmi_pins_a: dcmi-0 {
				pins {
					pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
						 <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
						 <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
						 <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
						 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
						 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
						 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
						 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
						 <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
						 <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
						 <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
						 <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
						 <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
						 <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
						 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
					bias-disable;
				};
			};

			dcmi_sleep_pins_a: dcmi-sleep-0 {
				pins {
					pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
						 <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
						 <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
						 <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
						 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
						 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
						 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
						 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
						 <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
						 <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
						 <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
						 <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
						 <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
						 <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
						 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
				};
			};

			ethernet0_rgmii_pins_a: rgmii-0 {
				pins1 {
					pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
@@ -241,6 +293,23 @@
				};
			};

			i2c1_pins_b: i2c1-2 {
				pins {
					pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
						 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
					bias-disable;
					drive-open-drain;
					slew-rate = <0>;
				};
			};

			i2c1_pins_sleep_b: i2c1-3 {
				pins {
					pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
						 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
				};
			};

			i2c2_pins_a: i2c2-0 {
				pins {
					pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
@@ -258,6 +327,21 @@
				};
			};

			i2c2_pins_b1: i2c2-2 {
				pins {
					pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
					bias-disable;
					drive-open-drain;
					slew-rate = <0>;
				};
			};

			i2c2_pins_sleep_b1: i2c2-3 {
				pins {
					pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
				};
			};

			i2c5_pins_a: i2c5-0 {
				pins {
					pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
@@ -276,6 +360,25 @@
				};
			};

			i2s2_pins_a: i2s2-0 {
				pins {
					pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
						 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
						 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
					slew-rate = <1>;
					drive-push-pull;
					bias-disable;
				};
			};

			i2s2_pins_sleep_a: i2s2-1 {
				pins {
					pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
						 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
						 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
				};
			};

			ltdc_pins_a: ltdc-a-0 {
				pins {
					pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
@@ -470,6 +573,12 @@
				};
			};

			qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
				pins {
					pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
				};
			};

			qspi_bk1_pins_a: qspi-bk1-0 {
				pins1 {
					pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
@@ -488,6 +597,16 @@
				};
			};

			qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
				pins {
					pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
						 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
						 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
						 <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
						 <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
				};
			};

			qspi_bk2_pins_a: qspi-bk2-0 {
				pins1 {
					pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
@@ -506,6 +625,89 @@
				};
			};

			qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
				pins {
					pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
						 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
						 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
						 <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
						 <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
				};
			};

			sai2a_pins_a: sai2a-0 {
				pins {
					pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
						 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
						 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
						 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
					slew-rate = <0>;
					drive-push-pull;
					bias-disable;
				};
			};

			sai2a_sleep_pins_a: sai2a-1 {
				pins {
					pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
						 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
						 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
						 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
				};
			};

			sai2b_pins_a: sai2b-0 {
				pins1 {
					pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
						 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
						 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
					slew-rate = <0>;
					drive-push-pull;
					bias-disable;
				};
				pins2 {
					pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
					bias-disable;
				};
			};

			sai2b_sleep_pins_a: sai2b-1 {
				pins {
					pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
						 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
						 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
						 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
				};
			};

			sai2b_pins_b: sai2b-2 {
				pins {
					pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
					bias-disable;
				};
			};

			sai2b_sleep_pins_b: sai2b-3 {
				pins {
					pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
				};
			};

			sai4a_pins_a: sai4a-0 {
				pins {
					pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
					slew-rate = <0>;
					drive-push-pull;
					bias-disable;
				};
			};

			sai4a_sleep_pins_a: sai4a-1 {
				pins {
					pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
				};
			};

			sdmmc1_b4_pins_a: sdmmc1-b4-0 {
				pins {
					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
@@ -599,6 +801,34 @@
					bias-disable;
				};
			};

			uart4_pins_b: uart4-1 {
				pins1 {
					pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
					bias-disable;
					drive-push-pull;
					slew-rate = <0>;
				};
				pins2 {
					pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
					bias-disable;
				};
			};

			uart7_pins_a: uart7-0 {
				pins1 {
					pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
					bias-disable;
					drive-push-pull;
					slew-rate = <0>;
				};
				pins2 {
					pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
						 <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
						 <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
					bias-disable;
				};
			};
		};

		pinctrl_z: pin-controller-z@54004000 {
@@ -621,6 +851,22 @@
				st,bank-ioport = <11>;
				ngpios = <8>;
				gpio-ranges = <&pinctrl_z 0 400 8>;
				status = "disabled";
			};

			i2c2_pins_b2: i2c2-0 {
				pins {
					pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
					bias-disable;
					drive-open-drain;
					slew-rate = <0>;
				};
			};

			i2c2_pins_sleep_b2: i2c2-1 {
				pins {
					pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
				};
			};

			i2c4_pins_a: i2c4-0 {
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