MIPS: KVM: Don't hardcode restored HWREna (b937ff62) · Commits · 戴 / test

KVM modifies CP0_HWREna during guest execution so it can trap and emulate RDHWR instructions, however it always restores the hardcoded value 0x2000000F. This assumes the presence of the UserLocal register, and the absence of any implementation dependent or future HW registers. Fix by exporting the value that traps.c write into CP0_HWREna, and loading from there instead of hard coding. Signed-off-by:

James Hogan <james.hogan@imgtec.com> Acked-by:

Ralf Baechle <ralf@linux-mips.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by:

Paolo Bonzini <pbonzini@redhat.com>

arch/mips/include/asm/setup.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -21,6 +21,7 @@ extern void *set_vi_handler(int n, vi_handler_t addr);

		extern void set_except_vector(int n, void addr);
		extern unsigned long ebase;
		extern unsigned int hwrena;
		extern void per_cpu_trap_init(bool);
		extern void cpu_cache_init(void);

arch/mips/kernel/traps.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -2064,10 +2064,13 @@ static void configure_status(void)
		status_set);
		}

		unsigned int hwrena;
		EXPORT_SYMBOL_GPL(hwrena);

		/* configure HWRENA register */
		static void configure_hwrena(void)
		{
		unsigned int hwrena = cpu_hwrena_impl_bits;
		hwrena = cpu_hwrena_impl_bits;

		if (cpu_has_mips_r2_r6)
		hwrena \|= MIPS_HWRENA_CPUNUM \|

arch/mips/kvm/locore.S

+2 −2

Original line number	Diff line number	Diff line
		@@ -381,7 +381,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
		mtc0 k0, CP0_DDATA_LO

		/* Restore RDHWR access */
		PTR_LI k0, 0x2000000F
		INT_L k0, hwrena
		mtc0 k0, CP0_HWRENA

		/* Jump to handler */
		@@ -553,7 +553,7 @@ __kvm_mips_return_to_host:
		mtlo k0

		/* Restore RDHWR access */
		PTR_LI k0, 0x2000000F
		INT_L k0, hwrena
		mtc0 k0, CP0_HWRENA

		/* Restore RA, which is the address we will return to */

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