Commit b92a66a6 authored by Michael Neuling's avatar Michael Neuling Committed by Benjamin Herrenschmidt
Browse files

powerpc: Add denormalisation exception handling for POWER6/7 



On POWER6 and POWER7 if the input operand to an instruction is a
denormalised single precision binary floating point value we can take
a denormalisation exception where it's expected that the hypervisor
(HV=1) will fix up the inputs before the instruction is run.

This adds code to handle this denormalisation exception for POWER6 and
POWER7.

It also add a CONFIG_PPC_DENORMALISATION option and sets it in
pseries/ppc64_defconfig.

This is useful on bare metal systems only.  Based on patch from Milton
Miller.

Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent eda485f0

arch/powerpc/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -560,6 +560,14 @@ config SCHED_SMT 
	  when dealing with POWER5 cpus at a cost of slightly increased

	  overhead in some places. If unsure say N here.



config PPC_DENORMALISATION

	bool "PowerPC denormalisation exception handling"

	depends on PPC_BOOK3S_64

	default "n"

	---help---

	  Add support for handling denormalisation of single precision

	  values.  Useful for bare metal only.  If unsure say Y here.



config CMDLINE_BOOL

	bool "Default bootloader kernel arguments"

arch/powerpc/configs/ppc64_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ CONFIG_KEXEC=y 
CONFIG_IRQ_ALL_CPUS=y

CONFIG_MEMORY_HOTREMOVE=y

CONFIG_SCHED_SMT=y

CONFIG_PPC_DENORMALISATION=y

CONFIG_PCCARD=y

CONFIG_ELECTRA_CF=y

CONFIG_HOTPLUG_PCI=m

arch/powerpc/configs/pseries_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ CONFIG_MEMORY_HOTREMOVE=y 
CONFIG_PPC_64K_PAGES=y

CONFIG_PPC_SUBPAGE_PROT=y

CONFIG_SCHED_SMT=y

CONFIG_PPC_DENORMALISATION=y

CONFIG_HOTPLUG_PCI=m

CONFIG_HOTPLUG_PCI_RPA=m

CONFIG_HOTPLUG_PCI_RPA_DLPAR=m

arch/powerpc/include/asm/ppc-opcode.h

+3 −0
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@ 
#define PPC_INST_TLBIVAX		0x7c000624

#define PPC_INST_TLBSRX_DOT		0x7c0006a5

#define PPC_INST_XXLOR			0xf0000510

#define PPC_INST_XVCPSGNDP		0xf0000780



#define PPC_INST_NAP			0x4c000364

#define PPC_INST_SLEEP			0x4c0003a4
@@ -277,6 +278,8 @@ 
					       VSX_XX1((s), a, b))

#define XXLOR(t, a, b)		stringify_in_c(.long PPC_INST_XXLOR | \

					       VSX_XX3((t), a, b))

#define XVCPSGNDP(t, a, b)	stringify_in_c(.long (PPC_INST_XVCPSGNDP | \

					       VSX_XX3((t), (a), (b))))



#define PPC_NAP			stringify_in_c(.long PPC_INST_NAP)

#define PPC_SLEEP		stringify_in_c(.long PPC_INST_SLEEP)

arch/powerpc/include/asm/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -524,6 +524,7 @@ 


#define SPRN_HSRR0	0x13A	/* Save/Restore Register 0 */

#define SPRN_HSRR1	0x13B	/* Save/Restore Register 1 */

#define   HSRR1_DENORM		0x00100000 /* Denorm exception */



#define SPRN_TBCTL	0x35f	/* PA6T Timebase control register */

#define   TBCTL_FREEZE		0x0000000000000000ull /* Freeze all tbs */

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