Commit b912b5e2 authored by John Linn's avatar John Linn Committed by Josh Boyer
Browse files

[POWERPC] Xilinx: of_serial support for Xilinx uart 16550. 



The Xilinx 16550 uart core is not a standard 16550 because it uses
word-based addressing rather than byte-based addressing. With
additional properties it is compatible with the open firmware
'ns16550' compatible binding.

This code updates the of_serial driver to handle the reg-offset
and reg-shift properties to enable this core to be used.

Signed-off-by: default avatarJohn Linn <john.linn@xilinx.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
parent 2f0b45f8

Documentation/powerpc/booting-without-of.txt

+11 −0
Original line number Diff line number Diff line
@@ -2601,6 +2601,17 @@ platforms are moved over to use the flattened-device-tree model. 
                      differ between different families.  May be

                      'virtex2p', 'virtex4', or 'virtex5'.



      vi) Xilinx Uart 16550



      Xilinx UART 16550 devices are very similar to the NS16550 but with

      different register spacing and an offset from the base address.



      Requred properties:

       - clock-frequency : Frequency of the clock input

       - reg-offset : A value of 3 is required

       - reg-shift : A value of 2 is required





    p) Freescale Synchronous Serial Interface



       The SSI is a serial device that communicates with audio codecs.  It can

drivers/serial/of_serial.c

+13 −1
Original line number Diff line number Diff line
@@ -31,7 +31,8 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev, 
	struct resource resource;

	struct device_node *np = ofdev->node;

	const unsigned int *clk, *spd;

	int ret;

	const u32 *prop;

	int ret, prop_size;



	memset(port, 0, sizeof *port);

	spd = of_get_property(np, "current-speed", NULL);
@@ -49,6 +50,17 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev, 


	spin_lock_init(&port->lock);

	port->mapbase = resource.start;



	/* Check for shifted address mapping */

	prop = of_get_property(np, "reg-offset", &prop_size);

	if (prop && (prop_size == sizeof(u32)))

		port->mapbase += *prop;



	/* Check for registers offset within the devices address range */

	prop = of_get_property(np, "reg-shift", &prop_size);

	if (prop && (prop_size == sizeof(u32)))

		port->regshift = *prop;



	port->irq = irq_of_parse_and_map(np, 0);

	port->iotype = UPIO_MEM;

	port->type = type;

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