Commit b90d2b22 authored by Julien Thierry's avatar Julien Thierry Committed by Catalin Marinas
Browse files

arm64: cpufeature: Add cpufeature for IRQ priority masking 



Add a cpufeature indicating whether a cpu supports masking interrupts
by priority.

The feature will be properly enabled in a later patch.

Signed-off-by: default avatarJulien Thierry <julien.thierry@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent c9bfdf73

arch/arm64/include/asm/cpucaps.h

+2 −1
Original line number Diff line number Diff line
@@ -60,7 +60,8 @@ 
#define ARM64_HAS_ADDRESS_AUTH_IMP_DEF		39

#define ARM64_HAS_GENERIC_AUTH_ARCH		40

#define ARM64_HAS_GENERIC_AUTH_IMP_DEF		41

#define ARM64_HAS_IRQ_PRIO_MASKING		42



#define ARM64_NCAPS				42

#define ARM64_NCAPS				43



#endif /* __ASM_CPUCAPS_H */

arch/arm64/include/asm/cpufeature.h

+6 −0
Original line number Diff line number Diff line
@@ -612,6 +612,12 @@ static inline bool system_supports_generic_auth(void) 
		 cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_IMP_DEF));

}



static inline bool system_uses_irq_prio_masking(void)

{

	return IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) &&

	       cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING);

}



#define ARM64_SSBD_UNKNOWN		-1

#define ARM64_SSBD_FORCE_DISABLE	0

#define ARM64_SSBD_KERNEL		1

arch/arm64/kernel/cpufeature.c

+23 −0
Original line number Diff line number Diff line
@@ -1203,6 +1203,14 @@ static void cpu_enable_address_auth(struct arm64_cpu_capabilities const *cap) 
}

#endif /* CONFIG_ARM64_PTR_AUTH */



#ifdef CONFIG_ARM64_PSEUDO_NMI

static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry,

				   int scope)

{

	return false;

}

#endif



static const struct arm64_cpu_capabilities arm64_features[] = {

	{

		.desc = "GIC system register CPU interface",
@@ -1480,6 +1488,21 @@ static const struct arm64_cpu_capabilities arm64_features[] = { 
		.matches = has_cpuid_feature,

	},

#endif /* CONFIG_ARM64_PTR_AUTH */

#ifdef CONFIG_ARM64_PSEUDO_NMI

	{

		/*

		 * Depends on having GICv3

		 */

		.desc = "IRQ priority masking",

		.capability = ARM64_HAS_IRQ_PRIO_MASKING,

		.type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE,

		.matches = can_use_gic_priorities,

		.sys_reg = SYS_ID_AA64PFR0_EL1,

		.field_pos = ID_AA64PFR0_GIC_SHIFT,

		.sign = FTR_UNSIGNED,

		.min_field_value = 1,

	},

#endif

	{},

};

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