Commit b8edf848 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC multiplatform conversion patches from Olof Johansson:
 "Here are more patches in the progression towards multiplatform, sparse
  irq conversions in particular.

  Tegra has a handful of cleanups and general groundwork, but is not
  quite there yet on full enablement.

  Platforms that are enabled through this branch are VT8500 and Zynq.
  Note that i.MX was converted in one of the earlier cleanup branches as
  well (before we started a separate topic for multiplatform).  And both
  new platforms for this merge window, sunxi and bcm, were merged with
  multiplatform support enabled."

Fix up conflicts mostly as per Olof.

* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
  ARM: zynq: Remove all unused mach headers
  ARM: zynq: add support for ARCH_MULTIPLATFORM
  ARM: zynq: make use of debug_ll_io_init()
  ARM: zynq: remove TTC early mapping
  ARM: tegra: move debug-macro.S to include/debug
  ARM: tegra: don't include iomap.h from debug-macro.S
  ARM: tegra: decouple uncompress.h and debug-macro.S
  ARM: tegra: simplify DEBUG_LL UART selection options
  ARM: tegra: select SPARSE_IRQ
  ARM: tegra: enhance timer.c to get IO address from device tree
  ARM: tegra: enhance timer.c to get IRQ info from device tree
  ARM: timer: fix checkpatch warnings
  ARM: tegra: add TWD to device tree
  ARM: tegra: define DT bindings for and instantiate RTC
  ARM: tegra: define DT bindings for and instantiate timer
  clocksource/mtu-nomadik: use apb_pclk
  clk: ux500: Register mtu apb_pclocks
  ARM: plat-nomadik: convert platforms to SPARSE_IRQ
  mfd/db8500-prcmu: use the irq_domain_add_simple()
  mfd/ab8500-core: use irq_domain_add_simple()
  ...
parents db5b0ae0 3f54db78

Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt

0 → 100644
+19 −0
Original line number Diff line number Diff line 
NVIDIA Tegra20 real-time clock



The Tegra RTC maintains seconds and milliseconds counters, and five alarm

registers. The alarms and other interrupts may wake the system from low-power

state.



Required properties:



- compatible : should be "nvidia,tegra20-rtc".

- reg : Specifies base physical address and size of the registers.

- interrupts : A single interrupt specifier.



Example:



timer {

	compatible = "nvidia,tegra20-rtc";

	reg = <0x7000e000 0x100>;

	interrupts = <0 2 0x04>;

};

Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt

0 → 100644
+21 −0
Original line number Diff line number Diff line 
NVIDIA Tegra20 timer



The Tegra20 timer provides four 29-bit timer channels and a single 32-bit free

running counter. The first two channels may also trigger a watchdog reset.



Required properties:



- compatible : should be "nvidia,tegra20-timer".

- reg : Specifies base physical address and size of the registers.

- interrupts : A list of 4 interrupts; one per timer channel.



Example:



timer {

	compatible = "nvidia,tegra20-timer";

	reg = <0x60005000 0x60>;

	interrupts = <0 0 0x04

			0 1 0x04

			0 41 0x04

			0 42 0x04>;

};

Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt

0 → 100644
+23 −0
Original line number Diff line number Diff line 
NVIDIA Tegra30 timer



The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free

running counter, and 5 watchdog modules. The first two channels may also

trigger a legacy watchdog reset.



Required properties:



- compatible : should be "nvidia,tegra30-timer", "nvidia,tegra20-timer".

- reg : Specifies base physical address and size of the registers.

- interrupts : A list of 6 interrupts; one per each of timer channels 1

    through 5, and one for the shared interrupt for the remaining channels.



timer {

	compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";

	reg = <0x60005000 0x400>;

	interrupts = <0 0 0x04

		      0 1 0x04

		      0 41 0x04

		      0 42 0x04

		      0 121 0x04

		      0 122 0x04>;

};

arch/arm/Kconfig

+10 −14
Original line number Diff line number Diff line
@@ -650,6 +650,7 @@ config ARCH_TEGRA 
	select HAVE_CLK

	select HAVE_SMP

	select MIGHT_HAVE_CACHE_L2X0

	select SPARSE_IRQ

	select USE_OF

	help

	  This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -891,6 +892,7 @@ config ARCH_U8500 
	select GENERIC_CLOCKEVENTS

	select HAVE_SMP

	select MIGHT_HAVE_CACHE_L2X0

	select SPARSE_IRQ

	help

	  Support for ST-Ericsson's Ux500 architecture
@@ -905,6 +907,7 @@ config ARCH_NOMADIK 
	select MIGHT_HAVE_CACHE_L2X0

	select PINCTRL

	select PINCTRL_STN8815

	select SPARSE_IRQ

	help

	  Support for the Nomadik platform by ST-Ericsson
@@ -948,7 +951,7 @@ config ARCH_OMAP 
	help

	  Support for TI's OMAP platform (OMAP1/2/3/4).



config ARCH_VT8500

config ARCH_VT8500_SINGLE

	bool "VIA/WonderMedia 85xx"

	select ARCH_HAS_CPUFREQ

	select ARCH_REQUIRE_GPIOLIB
@@ -958,22 +961,12 @@ config ARCH_VT8500 
	select GENERIC_CLOCKEVENTS

	select GENERIC_GPIO

	select HAVE_CLK

	select MULTI_IRQ_HANDLER

	select SPARSE_IRQ

	select USE_OF

	help

	  Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.



config ARCH_ZYNQ

	bool "Xilinx Zynq ARM Cortex A9 Platform"

	select ARM_AMBA

	select ARM_GIC

	select COMMON_CLK

	select CPU_V7

	select GENERIC_CLOCKEVENTS

	select ICST

	select MIGHT_HAVE_CACHE_L2X0

	select USE_OF

	help

	  Support for Xilinx Zynq ARM Cortex A9 Platform

endchoice



menu "Multiple platform selection"
@@ -1074,7 +1067,6 @@ source "arch/arm/mach-mxs/Kconfig" 
source "arch/arm/mach-netx/Kconfig"



source "arch/arm/mach-nomadik/Kconfig"

source "arch/arm/plat-nomadik/Kconfig"



source "arch/arm/plat-omap/Kconfig"
@@ -1137,8 +1129,12 @@ source "arch/arm/mach-versatile/Kconfig" 
source "arch/arm/mach-vexpress/Kconfig"

source "arch/arm/plat-versatile/Kconfig"



source "arch/arm/mach-vt8500/Kconfig"



source "arch/arm/mach-w90x900/Kconfig"



source "arch/arm/mach-zynq/Kconfig"



# Definitions to make life easier

config ARCH_ACORN

	bool

arch/arm/Kconfig.debug

+39 −0
Original line number Diff line number Diff line
@@ -379,6 +379,13 @@ choice 
		  Say Y here if you want kernel low-level debugging support

		  on Allwinner A1X based platforms on the UART1.



	config DEBUG_TEGRA_UART

		depends on ARCH_TEGRA

		bool "Use Tegra UART for low-level debug"

		help

		  Say Y here if you want kernel low-level debugging support

		  on Tegra based platforms.



	config DEBUG_VEXPRESS_UART0_DETECT

		bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"

		depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -452,6 +459,36 @@ config DEBUG_IMX6Q_UART_PORT 
	  Choose UART port on which kernel low-level debug messages

	  should be output.



choice

	prompt "Low-level debug console UART"

	depends on DEBUG_LL && DEBUG_TEGRA_UART



	config TEGRA_DEBUG_UART_AUTO_ODMDATA

	bool "Via ODMDATA"

	help

	  Automatically determines which UART to use for low-level debug based

	  on the ODMDATA value. This value is part of the BCT, and is written

	  to the boot memory device using nvflash, or other flashing tool.

	  When bits 19:18 are 3, then bits 17:15 indicate which UART to use;

	  0/1/2/3/4 are UART A/B/C/D/E.



	config TEGRA_DEBUG_UARTA

		bool "UART A"



	config TEGRA_DEBUG_UARTB

		bool "UART B"



	config TEGRA_DEBUG_UARTC

		bool "UART C"



	config TEGRA_DEBUG_UARTD

		bool "UART D"



	config TEGRA_DEBUG_UARTE

		bool "UART E"



endchoice



config DEBUG_LL_INCLUDE

	string

	default "debug/icedcc.S" if DEBUG_ICEDCC
@@ -469,6 +506,8 @@ config DEBUG_LL_INCLUDE 
	default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1

	default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \

		DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1

	default "debug/tegra.S" if DEBUG_TEGRA_UART

	default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1

	default "mach/debug-macro.S"



config EARLY_PRINTK

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