Unverified Commit b867eef4 authored Sep 04, 2020 by Chris Packham Committed by Mark Brown Sep 21, 2020

spi: fsl-espi: Only process interrupts for expected events



The SPIE register contains counts for the TX FIFO so any time the irq
handler was invoked we would attempt to process the RX/TX fifos. Use the
SPIM value to mask the events so that we only process interrupts that
were expected.

This was a latent issue exposed by commit 3282a3da ("powerpc/64:
Implement soft interrupt replay in C").

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Link: https://lore.kernel.org/r/20200904002812.7300-1-chris.packham@alliedtelesis.co.nz


Signed-off-by: Mark Brown <broonie@kernel.org>

parent 50851f50

drivers/spi/spi-fsl-espi.c

+3 −2

Original line number	Diff line number	Diff line
		@@ -564,13 +564,14 @@ static void fsl_espi_cpu_irq(struct fsl_espi *espi, u32 events)
		static irqreturn_t fsl_espi_irq(s32 irq, void *context_data)
		{
		struct fsl_espi *espi = context_data;
		u32 events;
		u32 events, mask;

		spin_lock(&espi->lock);

		/* Get interrupt events(tx/rx) */
		events = fsl_espi_read_reg(espi, ESPI_SPIE);
		if (!events) {
		mask = fsl_espi_read_reg(espi, ESPI_SPIM);
		if (!(events & mask)) {
		spin_unlock(&espi->lock);
		return IRQ_NONE;
		}

Admin message