Commit b85751c7 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-rcar-sysc2-for-v4.8' of... 

Merge tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8

* Prepare for handling SYSC interrupt configuration purely
  from DT in the rcar-sysc driver for new SoCs, while preserving
  backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support

* tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
  soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
  soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
  soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
  soc: renesas: rcar-sysc: add R8A7792 support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 564c9741 ced42730

arch/arm/mach-shmobile/pm-r8a7779.c

+1 −5
Original line number Diff line number Diff line
@@ -23,11 +23,7 @@ 


static void __init r8a7779_sysc_init(void)

{

	void __iomem *base = rcar_sysc_init(0xffd85000);



	/* enable all interrupt sources, but do not use interrupt handler */

	iowrite32(0x0131000e, base + SYSCIER);

	iowrite32(0, base + SYSCIMR);

	rcar_sysc_init(0xffd85000, 0x0131000e);

}



#else /* CONFIG_PM || CONFIG_SMP */

arch/arm/mach-shmobile/pm-rcar-gen2.c

+1 −5
Original line number Diff line number Diff line
@@ -37,11 +37,7 @@ 


static void __init rcar_gen2_sysc_init(u32 syscier)

{

	void __iomem *base = rcar_sysc_init(0xe6180000);



	/* enable all interrupt sources, but do not use interrupt handler */

	iowrite32(syscier, base + SYSCIER);

	iowrite32(0, base + SYSCIMR);

	rcar_sysc_init(0xe6180000, syscier);

}



#else /* CONFIG_SMP */

drivers/soc/renesas/Makefile

+1 −0
Original line number Diff line number Diff line 
obj-$(CONFIG_ARCH_R8A7779)	+= rcar-sysc.o r8a7779-sysc.o

obj-$(CONFIG_ARCH_R8A7790)	+= rcar-sysc.o r8a7790-sysc.o

obj-$(CONFIG_ARCH_R8A7791)	+= rcar-sysc.o r8a7791-sysc.o

obj-$(CONFIG_ARCH_R8A7792)	+= rcar-sysc.o r8a7792-sysc.o

# R-Car M2-N is identical to R-Car M2-W w.r.t. power domains.

obj-$(CONFIG_ARCH_R8A7793)	+= rcar-sysc.o r8a7791-sysc.o

obj-$(CONFIG_ARCH_R8A7794)	+= rcar-sysc.o r8a7794-sysc.o

drivers/soc/renesas/r8a7792-sysc.c

0 → 100644
+34 −0
Original line number Diff line number Diff line 
/*

 * Renesas R-Car V2H (R8A7792) System Controller

 *

 * Copyright (C) 2016 Cogent Embedded Inc.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; version 2 of the License.

 */



#include <linux/bug.h>

#include <linux/init.h>

#include <linux/kernel.h>



#include <dt-bindings/power/r8a7792-sysc.h>



#include "rcar-sysc.h"



static const struct rcar_sysc_area r8a7792_areas[] __initconst = {

	{ "always-on",	    0, 0, R8A7792_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },

	{ "ca15-scu",	0x180, 0, R8A7792_PD_CA15_SCU,	R8A7792_PD_ALWAYS_ON,

	  PD_SCU },

	{ "ca15-cpu0",	 0x40, 0, R8A7792_PD_CA15_CPU0,	R8A7792_PD_CA15_SCU,

	  PD_CPU_NOCR },

	{ "ca15-cpu1",	 0x40, 1, R8A7792_PD_CA15_CPU1,	R8A7792_PD_CA15_SCU,

	  PD_CPU_NOCR },

	{ "sgx",	 0xc0, 0, R8A7792_PD_SGX,	R8A7792_PD_ALWAYS_ON },

	{ "imp",	0x140, 0, R8A7792_PD_IMP,	R8A7792_PD_ALWAYS_ON },

};



const struct rcar_sysc_info r8a7792_sysc_info __initconst = {

	.areas = r8a7792_areas,

	.num_areas = ARRAY_SIZE(r8a7792_areas),

};

drivers/soc/renesas/rcar-sysc.c

+32 −10
Original line number Diff line number Diff line
@@ -164,15 +164,6 @@ static bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch) 
	return false;

}



void __iomem *rcar_sysc_init(phys_addr_t base)

{

	rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);

	if (!rcar_sysc_base)

		panic("unable to ioremap R-Car SYSC hardware block\n");



	return rcar_sysc_base;

}



struct rcar_sysc_pd {

	struct generic_pm_domain genpd;

	struct rcar_sysc_ch ch;
@@ -293,6 +284,9 @@ static const struct of_device_id rcar_sysc_matches[] = { 
#ifdef CONFIG_ARCH_R8A7791

	{ .compatible = "renesas,r8a7791-sysc", .data = &r8a7791_sysc_info },

#endif

#ifdef CONFIG_ARCH_R8A7792

	{ .compatible = "renesas,r8a7792-sysc", .data = &r8a7792_sysc_info },

#endif

#ifdef CONFIG_ARCH_R8A7793

	/* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */

	{ .compatible = "renesas,r8a7793-sysc", .data = &r8a7791_sysc_info },
@@ -325,6 +319,9 @@ static int __init rcar_sysc_pd_init(void) 
	unsigned int i;

	int error;



	if (rcar_sysc_base)

		return 0;



	np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, &match);

	if (!np)

		return -ENODEV;
@@ -395,10 +392,35 @@ static int __init rcar_sysc_pd_init(void) 
		domains->domains[area->isr_bit] = &pd->genpd;

	}



	of_genpd_add_provider_onecell(np, &domains->onecell_data);

	error = of_genpd_add_provider_onecell(np, &domains->onecell_data);



out_put:

	of_node_put(np);

	return error;

}

early_initcall(rcar_sysc_pd_init);



void __init rcar_sysc_init(phys_addr_t base, u32 syscier)

{

	u32 syscimr;



	if (!rcar_sysc_pd_init())

		return;



	rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);



	/*

	 * Mask all interrupt sources to prevent the CPU from receiving them.

	 * Make sure not to clear reserved bits that were set before.

	 */

	syscimr = ioread32(rcar_sysc_base + SYSCIMR);

	syscimr |= syscier;

	pr_debug("%s: syscimr = 0x%08x\n", __func__, syscimr);

	iowrite32(syscimr, rcar_sysc_base + SYSCIMR);



	/*

	 * SYSC needs all interrupt sources enabled to control power.

	 */

	pr_debug("%s: syscier = 0x%08x\n", __func__, syscier);

	iowrite32(syscier, rcar_sysc_base + SYSCIER);

}

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