parisc/pci: Switch LBA PCI bus from Hard Fail to Soft Fail mode (b845f66f) · Commits · 戴 / test

Carlo Pisani noticed that his C3600 workstation behaved unstable during heavy I/O on the PCI bus with a VIA VT6421 IDE/SATA PCI card. To avoid such instability, this patch switches the LBA PCI bus from Hard Fail mode into Soft Fail mode. In this mode the bus will return -1UL for timed out MMIO transactions, which is exactly how the x86 (and most other architectures) PCI busses behave. This patch is based on a proposal by Grant Grundler and Kyle McMartin 10 years ago: https://www.spinics.net/lists/linux-parisc/msg01027.html Cc: Carlo Pisani <carlojpisani@gmail.com> Cc: Kyle McMartin <kyle@mcmartin.ca> Reviewed-by:

Grant Grundler <grantgrundler@gmail.com> Signed-off-by:

Helge Deller <deller@gmx.de>

drivers/parisc/lba_pci.c

+19 −1

Original line number	Diff line number	Diff line
		@@ -1403,9 +1403,27 @@ lba_hw_init(struct lba_device *d)
		WRITE_REG32(stat, d->hba.base_addr + LBA_ERROR_CONFIG);
		}

		/* Set HF mode as the default (vs. -1 mode). */

		/*
		* Hard Fail vs. Soft Fail on PCI "Master Abort".
		*
		* "Master Abort" means the MMIO transaction timed out - usually due to
		* the device not responding to an MMIO read. We would like HF to be
		* enabled to find driver problems, though it means the system will
		* crash with a HPMC.
		*
		* In SoftFail mode "~0L" is returned as a result of a timeout on the
		* pci bus. This is like how PCI busses on x86 and most other
		* architectures behave. In order to increase compatibility with
		* existing (x86) PCI hardware and existing Linux drivers we enable
		* Soft Faul mode on PA-RISC now too.
		*/
		stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL);
		#if defined(ENABLE_HARDFAIL)
		WRITE_REG32(stat \| HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL);
		#else
		WRITE_REG32(stat & ~HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL);
		#endif

		/*
		** Writing a zero to STAT_CTL.rf (bit 0) will clear reset signal

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