Commit b84449dc authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'parisc-4.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux 

Pull parisc fixes from Helge Deller:

 - Many small fixes to show the real physical addresses of devices
   instead of hashed addresses.

 - One important fix to unbreak 32-bit SMP support: We forgot to 16-byte
   align the spinlocks in the assembler code.

 - Qemu support: The host will get a chance to sleep when the parisc
   guest is idle. We use the same mechanism as the power architecture by
   overlaying the "or %r10,%r10,%r10" instruction which is simply a nop
   on real hardware.

* 'parisc-4.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: qemu idle sleep support
  parisc: Fix alignment of pa_tlb_lock in assembly on 32-bit SMP kernel
  parisc: Show unhashed EISA EEPROM address
  parisc: Show unhashed HPA of Dino chip
  parisc: Show initial kernel memory layout unhashed
  parisc: Show unhashed hardware inventory
parents 9cfd403a 310d8278

arch/parisc/include/asm/ldcw.h

+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
   for the semaphore.  */



#define __PA_LDCW_ALIGNMENT	16

#define __PA_LDCW_ALIGN_ORDER	4

#define __ldcw_align(a) ({					\

	unsigned long __ret = (unsigned long) &(a)->lock[0];	\

	__ret = (__ret + __PA_LDCW_ALIGNMENT - 1)		\
@@ -29,6 +30,7 @@ 
   ldcd). */



#define __PA_LDCW_ALIGNMENT	4

#define __PA_LDCW_ALIGN_ORDER	2

#define __ldcw_align(a) (&(a)->slock)

#define __LDCW	"ldcw,co"

arch/parisc/kernel/drivers.c

+1 −1
Original line number Diff line number Diff line
@@ -870,7 +870,7 @@ static void print_parisc_device(struct parisc_device *dev) 
	static int count;



	print_pa_hwpath(dev, hw_path);

	printk(KERN_INFO "%d. %s at 0x%p [%s] { %d, 0x%x, 0x%.3x, 0x%.5x }",

	printk(KERN_INFO "%d. %s at 0x%px [%s] { %d, 0x%x, 0x%.3x, 0x%.5x }",

		++count, dev->name, (void*) dev->hpa.start, hw_path, dev->id.hw_type,

		dev->id.hversion_rev, dev->id.hversion, dev->id.sversion);

arch/parisc/kernel/entry.S

+11 −2
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
#include <asm/pgtable.h>

#include <asm/signal.h>

#include <asm/unistd.h>

#include <asm/ldcw.h>

#include <asm/thread_info.h>



#include <linux/linkage.h>
@@ -46,6 +47,14 @@ 
#endif



	.import		pa_tlb_lock,data

	.macro  load_pa_tlb_lock reg

#if __PA_LDCW_ALIGNMENT > 4

	load32	PA(pa_tlb_lock) + __PA_LDCW_ALIGNMENT-1, \reg

	depi	0,31,__PA_LDCW_ALIGN_ORDER, \reg

#else

	load32	PA(pa_tlb_lock), \reg

#endif

	.endm



	/* space_to_prot macro creates a prot id from a space id */
@@ -457,7 +466,7 @@ 
	.macro		tlb_lock	spc,ptp,pte,tmp,tmp1,fault

#ifdef CONFIG_SMP

	cmpib,COND(=),n	0,\spc,2f

	load32		PA(pa_tlb_lock),\tmp

	load_pa_tlb_lock \tmp

1:	LDCW		0(\tmp),\tmp1

	cmpib,COND(=)	0,\tmp1,1b

	nop
@@ -480,7 +489,7 @@ 
	/* Release pa_tlb_lock lock. */

	.macro		tlb_unlock1	spc,tmp

#ifdef CONFIG_SMP

	load32		PA(pa_tlb_lock),\tmp

	load_pa_tlb_lock \tmp

	tlb_unlock0	\spc,\tmp

#endif

	.endm

arch/parisc/kernel/pacache.S

+7 −2
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 
#include <asm/assembly.h>

#include <asm/pgtable.h>

#include <asm/cache.h>

#include <asm/ldcw.h>

#include <linux/linkage.h>



	.text
@@ -333,8 +334,12 @@ ENDPROC_CFI(flush_data_cache_local) 


	.macro	tlb_lock	la,flags,tmp

#ifdef CONFIG_SMP

	ldil		L%pa_tlb_lock,%r1

	ldo		R%pa_tlb_lock(%r1),\la

#if __PA_LDCW_ALIGNMENT > 4

	load32		pa_tlb_lock + __PA_LDCW_ALIGNMENT-1, \la

	depi		0,31,__PA_LDCW_ALIGN_ORDER, \la

#else

	load32		pa_tlb_lock, \la

#endif

	rsm		PSW_SM_I,\flags

1:	LDCW		0(\la),\tmp

	cmpib,<>,n	0,\tmp,3f

arch/parisc/kernel/process.c

+39 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 
#include <linux/kernel.h>

#include <linux/mm.h>

#include <linux/fs.h>

#include <linux/cpu.h>

#include <linux/module.h>

#include <linux/personality.h>

#include <linux/ptrace.h>
@@ -183,6 +184,44 @@ int dump_task_fpu (struct task_struct *tsk, elf_fpregset_t *r) 
	return 1;

}



/*

 * Idle thread support

 *

 * Detect when running on QEMU with SeaBIOS PDC Firmware and let

 * QEMU idle the host too.

 */



int running_on_qemu __read_mostly;



void __cpuidle arch_cpu_idle_dead(void)

{

	/* nop on real hardware, qemu will offline CPU. */

	asm volatile("or %%r31,%%r31,%%r31\n":::);

}



void __cpuidle arch_cpu_idle(void)

{

	local_irq_enable();



	/* nop on real hardware, qemu will idle sleep. */

	asm volatile("or %%r10,%%r10,%%r10\n":::);

}



static int __init parisc_idle_init(void)

{

	const char *marker;



	/* check QEMU/SeaBIOS marker in PAGE0 */

	marker = (char *) &PAGE0->pad0;

	running_on_qemu = (memcmp(marker, "SeaBIOS", 8) == 0);



	if (!running_on_qemu)

		cpu_idle_poll_ctrl(1);



	return 0;

}

arch_initcall(parisc_idle_init);



/*

 * Copy architecture-specific thread state

 */

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