Commit b831ef2c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull RAS changes from Ingo Molnar:
 "The main system reliability related changes were from x86, but also
  some generic RAS changes:

   - AMD MCE error injection subsystem enhancements.  (Aravind
     Gopalakrishnan)

   - Fix MCE and CPU hotplug interaction bug.  (Ashok Raj)

   - kcrash bootup robustness fix.  (Baoquan He)

   - kcrash cleanups.  (Borislav Petkov)

   - x86 microcode driver rework: simplify it by unmodularizing it and
     other cleanups.  (Borislav Petkov)"

* 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
  x86/mce: Add a default case to the switch in __mcheck_cpu_ancient_init()
  x86/mce: Add a Scalable MCA vendor flags bit
  MAINTAINERS: Unify the microcode driver section
  x86/microcode/intel: Move #ifdef DEBUG inside the function
  x86/microcode/amd: Remove maintainers from comments
  x86/microcode: Remove modularization leftovers
  x86/microcode: Merge the early microcode loader
  x86/microcode: Unmodularize the microcode driver
  x86/mce: Fix thermal throttling reporting after kexec
  kexec/crash: Say which char is the unrecognized
  x86/setup/crash: Check memblock_reserve() retval
  x86/setup/crash: Cleanup some more
  x86/setup/crash: Remove alignment variable
  x86/setup: Cleanup crashkernel reservation functions
  x86/amd_nb, EDAC: Rename amd_get_node_id()
  x86/setup: Do not reserve crashkernel high memory if low reservation failed
  x86/microcode/amd: Do not overwrite final patch levels
  x86/microcode/amd: Extract current patch level read to a function
  x86/ras/mce_amd_inj: Inject bank 4 errors on the NBC
  x86/ras/mce_amd_inj: Trigger deferred and thresholding errors interrupts
  ...
parents b02ac6b1 dc34bdd2

MAINTAINERS

+5 −11
Original line number Diff line number Diff line
@@ -660,11 +660,6 @@ F: drivers/gpu/drm/radeon/radeon_kfd.c 
F:	drivers/gpu/drm/radeon/radeon_kfd.h

F:	include/uapi/linux/kfd_ioctl.h



AMD MICROCODE UPDATE SUPPORT

M:	Borislav Petkov <bp@alien8.de>

S:	Maintained

F:	arch/x86/kernel/cpu/microcode/amd*



AMD XGBE DRIVER

M:	Tom Lendacky <thomas.lendacky@amd.com>

L:	netdev@vger.kernel.org
@@ -5468,12 +5463,6 @@ W: https://01.org/linux-acpi 
S:	Supported

F:	drivers/platform/x86/intel_menlow.c



INTEL IA32 MICROCODE UPDATE SUPPORT

M:	Borislav Petkov <bp@alien8.de>

S:	Maintained

F:	arch/x86/kernel/cpu/microcode/core*

F:	arch/x86/kernel/cpu/microcode/intel*



INTEL I/OAT DMA DRIVER

M:	Dave Jiang <dave.jiang@intel.com>

R:	Dan Williams <dan.j.williams@intel.com>
@@ -11505,6 +11494,11 @@ L: linux-edac@vger.kernel.org 
S:	Maintained

F:	arch/x86/kernel/cpu/mcheck/*



X86 MICROCODE UPDATE SUPPORT

M:	Borislav Petkov <bp@alien8.de>

S:	Maintained

F:	arch/x86/kernel/cpu/microcode/*



X86 VDSO

M:	Andy Lutomirski <luto@amacapital.net>

L:	linux-kernel@vger.kernel.org

arch/x86/Kconfig

+3 −19
Original line number Diff line number Diff line
@@ -1123,8 +1123,10 @@ config X86_REBOOTFIXUPS 
	  Say N otherwise.



config MICROCODE

	tristate "CPU microcode loading support"

	bool "CPU microcode loading support"

	default y

	depends on CPU_SUP_AMD || CPU_SUP_INTEL

	depends on BLK_DEV_INITRD

	select FW_LOADER

	---help---
@@ -1166,24 +1168,6 @@ config MICROCODE_OLD_INTERFACE 
	def_bool y

	depends on MICROCODE



config MICROCODE_INTEL_EARLY

	bool



config MICROCODE_AMD_EARLY

	bool



config MICROCODE_EARLY

	bool "Early load microcode"

	depends on MICROCODE=y && BLK_DEV_INITRD

	select MICROCODE_INTEL_EARLY if MICROCODE_INTEL

	select MICROCODE_AMD_EARLY if MICROCODE_AMD

	default y

	help

	  This option provides functionality to read additional microcode data

	  at the beginning of initrd image. The data tells kernel to load

	  microcode to CPU's as early as possible. No functional change if no

	  microcode data is glued to the initrd, therefore it's safe to say Y.



config X86_MSR

	tristate "/dev/cpu/*/msr - Model-specific register support"

	---help---

arch/x86/include/asm/amd_nb.h

+1 −1
Original line number Diff line number Diff line
@@ -81,7 +81,7 @@ static inline struct amd_northbridge *node_to_amd_nb(int node) 
	return (node < amd_northbridges.num) ? &amd_northbridges.nb[node] : NULL;

}



static inline u16 amd_get_node_id(struct pci_dev *pdev)

static inline u16 amd_pci_dev_to_node_id(struct pci_dev *pdev)

{

	struct pci_dev *misc;

	int i;

arch/x86/include/asm/mce.h

+21 −13
Original line number Diff line number Diff line
@@ -124,18 +124,26 @@ struct mca_config { 


struct mce_vendor_flags {

	/*

			 * overflow recovery cpuid bit indicates that overflow

			 * conditions are not fatal

	 * Indicates that overflow conditions are not fatal, when set.

	 */

	__u64 overflow_recov	: 1,



	/*

			 * SUCCOR stands for S/W UnCorrectable error COntainment

			 * and Recovery. It indicates support for data poisoning

			 * in HW and deferred error interrupts.

	 * (AMD) SUCCOR stands for S/W UnCorrectable error COntainment and

	 * Recovery. It indicates support for data poisoning in HW and deferred

	 * error interrupts.

	 */

	      succor		: 1,

			__reserved_0	: 62;



	/*

	 * (AMD) SMCA: This bit indicates support for Scalable MCA which expands

	 * the register space for each MCA bank and also increases number of

	 * banks. Also, to accommodate the new banks and registers, the MCA

	 * register space is moved to a new MSR range.

	 */

	      smca		: 1,



	      __reserved_0	: 61;

};

extern struct mce_vendor_flags mce_flags;

arch/x86/include/asm/microcode.h

+13 −13
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@ struct cpu_signature { 
struct device;



enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };

extern bool dis_ucode_ldr;



struct microcode_ops {

	enum ucode_state (*request_microcode_user) (int cpu,
@@ -55,6 +54,12 @@ struct ucode_cpu_info { 
};

extern struct ucode_cpu_info ucode_cpu_info[];



#ifdef CONFIG_MICROCODE

int __init microcode_init(void);

#else

static inline int __init microcode_init(void)	{ return 0; };

#endif



#ifdef CONFIG_MICROCODE_INTEL

extern struct microcode_ops * __init init_intel_microcode(void);

#else
@@ -75,7 +80,6 @@ static inline struct microcode_ops * __init init_amd_microcode(void) 
static inline void __exit exit_amd_microcode(void) {}

#endif



#ifdef CONFIG_MICROCODE_EARLY

#define MAX_UCODE_COUNT 128



#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
@@ -150,6 +154,7 @@ static inline unsigned int x86_model(unsigned int sig) 
	return model;

}



#ifdef CONFIG_MICROCODE

extern void __init load_ucode_bsp(void);

extern void load_ucode_ap(void);

extern int __init save_microcode_in_initrd(void);
@@ -158,14 +163,9 @@ extern bool get_builtin_firmware(struct cpio_data *cd, const char *name); 
#else

static inline void __init load_ucode_bsp(void)			{ }

static inline void load_ucode_ap(void)				{ }

static inline int __init save_microcode_in_initrd(void)

{

	return 0;

}

static inline int __init save_microcode_in_initrd(void)		{ return 0; }

static inline void reload_early_microcode(void)			{ }

static inline bool get_builtin_firmware(struct cpio_data *cd, const char *name)

{

	return false;

}

static inline bool

get_builtin_firmware(struct cpio_data *cd, const char *name)	{ return false; }

#endif

#endif /* _ASM_X86_MICROCODE_H */

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