Commit b82049f2 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge tag 'omap-for-v5.5/soc-late-signed' into omap-for-v5.5/ti-sysc-late 

Few late SoC changes for v5.5 merge window

These changes just clean up few typos, and there is one non-critical
correction of missing put_device() after calling of_platform_populate()
for display controller.

Naturally none of this is urgent and can be merged when suitable.
parents b08a0c57 0b491904

arch/arm/boot/dts/am335x-icev2.dts

+1 −1
Original line number Diff line number Diff line
@@ -432,7 +432,7 @@ 
	pinctrl-0 = <&mmc0_pins_default>;

};



&gpio0 {

&gpio0_target {

	/* Do not idle the GPIO used for holding the VTT regulator */

	ti,no-reset-on-init;

	ti,no-idle-on-init;

arch/arm/boot/dts/am33xx-l4.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ 
			ranges = <0x0 0x5000 0x1000>;

		};



		target-module@7000 {			/* 0x44e07000, ap 14 20.0 */

		gpio0_target: target-module@7000 {	/* 0x44e07000, ap 14 20.0 */

			compatible = "ti,sysc-omap2", "ti,sysc";

			reg = <0x7000 0x4>,

			      <0x7010 0x4>,
@@ -2026,7 +2026,9 @@ 
			reg = <0xe000 0x4>,

			      <0xe054 0x4>;

			reg-names = "rev", "sysc";

			ti,sysc-midle ;

			ti,sysc-midle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

arch/arm/boot/dts/am3874-iceboard.dts

+1 −8
Original line number Diff line number Diff line
@@ -111,13 +111,13 @@ 
		reg = <0x70>;

		#address-cells = <1>;

		#size-cells = <0>;

		i2c-mux-idle-disconnect;



		i2c@0 {

			/* FMC A */

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0>;

			i2c-mux-idle-disconnect;

		};



		i2c@1 {
@@ -125,7 +125,6 @@ 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <1>;

			i2c-mux-idle-disconnect;

		};



		i2c@2 {
@@ -133,7 +132,6 @@ 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <2>;

			i2c-mux-idle-disconnect;

		};



		i2c@3 {
@@ -141,7 +139,6 @@ 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <3>;

			i2c-mux-idle-disconnect;

		};



		i2c@4 {
@@ -149,14 +146,12 @@ 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <4>;

			i2c-mux-idle-disconnect;

		};



		i2c@5 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <5>;

			i2c-mux-idle-disconnect;



			ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <5000>; };

			ina230@41 { compatible = "ti,ina230"; reg = <0x41>; shunt-resistor = <5000>; };
@@ -182,14 +177,12 @@ 
			#address-cells = <1>;

			#size-cells = <0>;

			reg = <6>;

			i2c-mux-idle-disconnect;

		};



		i2c@7 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <7>;

			i2c-mux-idle-disconnect;



			u41: pca9575@20 {

				compatible = "nxp,pca9575";

arch/arm/boot/dts/am4372.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -336,6 +336,8 @@ 
				ti,hwmods = "dss_dispc";

				clocks = <&disp_clk>;

				clock-names = "fck";



				max-memory-bandwidth = <230000000>;

			};



			rfbi: rfbi@4832a800 {

arch/arm/boot/dts/dra7-l4.dtsi

+21 −27
Original line number Diff line number Diff line
@@ -2729,7 +2729,7 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 129 1>, <&edma_xbar 128 1>;

				dma-names = "tx", "rx";

				clocks = <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 22>,

				clocks = <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 0>,

					 <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 24>,

					 <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 28>;

				clock-names = "fck", "ahclkx", "ahclkr";
@@ -2765,8 +2765,8 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 131 1>, <&edma_xbar 130 1>;

				dma-names = "tx", "rx";

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 22>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 24>,

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 0>,

					 <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 24>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 28>;

				clock-names = "fck", "ahclkx", "ahclkr";

				status = "disabled";
@@ -2783,9 +2783,8 @@ 
					<SYSC_IDLE_SMART>;

			/* Domains (P, C): l4per_pwrdm, l4per2_clkdm */

			clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 28>;

			clock-names = "fck", "ahclkx", "ahclkr";

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;

			clock-names = "fck", "ahclkx";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x68000 0x2000>,
@@ -2801,7 +2800,7 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>;

				dma-names = "tx", "rx";

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 22>,

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;

				clock-names = "fck", "ahclkx";

				status = "disabled";
@@ -2818,9 +2817,8 @@ 
					<SYSC_IDLE_SMART>;

			/* Domains (P, C): l4per_pwrdm, l4per2_clkdm */

			clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 28>;

			clock-names = "fck", "ahclkx", "ahclkr";

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>;

			clock-names = "fck", "ahclkx";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x6c000 0x2000>,
@@ -2836,7 +2834,7 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 135 1>, <&edma_xbar 134 1>;

				dma-names = "tx", "rx";

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 22>,

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>;

				clock-names = "fck", "ahclkx";

				status = "disabled";
@@ -2853,9 +2851,8 @@ 
					<SYSC_IDLE_SMART>;

			/* Domains (P, C): l4per_pwrdm, l4per2_clkdm */

			clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 28>;

			clock-names = "fck", "ahclkx", "ahclkr";

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>;

			clock-names = "fck", "ahclkx";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x70000 0x2000>,
@@ -2871,7 +2868,7 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 137 1>, <&edma_xbar 136 1>;

				dma-names = "tx", "rx";

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 22>,

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>;

				clock-names = "fck", "ahclkx";

				status = "disabled";
@@ -2888,9 +2885,8 @@ 
					<SYSC_IDLE_SMART>;

			/* Domains (P, C): l4per_pwrdm, l4per2_clkdm */

			clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 28>;

			clock-names = "fck", "ahclkx", "ahclkr";

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>;

			clock-names = "fck", "ahclkx";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x74000 0x2000>,
@@ -2906,7 +2902,7 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 139 1>, <&edma_xbar 138 1>;

				dma-names = "tx", "rx";

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 22>,

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>;

				clock-names = "fck", "ahclkx";

				status = "disabled";
@@ -2923,9 +2919,8 @@ 
					<SYSC_IDLE_SMART>;

			/* Domains (P, C): l4per_pwrdm, l4per2_clkdm */

			clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 28>;

			clock-names = "fck", "ahclkx", "ahclkr";

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>;

			clock-names = "fck", "ahclkx";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x78000 0x2000>,
@@ -2941,7 +2936,7 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 141 1>, <&edma_xbar 140 1>;

				dma-names = "tx", "rx";

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 22>,

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>;

				clock-names = "fck", "ahclkx";

				status = "disabled";
@@ -2958,9 +2953,8 @@ 
					<SYSC_IDLE_SMART>;

			/* Domains (P, C): l4per_pwrdm, l4per2_clkdm */

			clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 0>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>,

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 28>;

			clock-names = "fck", "ahclkx", "ahclkr";

				 <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>;

			clock-names = "fck", "ahclkx";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x7c000 0x2000>,
@@ -2976,7 +2970,7 @@ 
				interrupt-names = "tx", "rx";

				dmas = <&edma_xbar 143 1>, <&edma_xbar 142 1>;

				dma-names = "tx", "rx";

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 22>,

				clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 0>,

					 <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>;

				clock-names = "fck", "ahclkx";

				status = "disabled";

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