Commit b81e88de authored by Cristian Ciocaltea's avatar Cristian Ciocaltea Committed by Stephen Boyd
Browse files

clk: actions: Add APB, DMAC, GPIO clock support for Actions S500 SoC 



Add support for the missing APB, DMAC and GPIO clocks in the Actions
Semi S500 SoC clock driver.

Signed-off-by: default avatarCristian Ciocaltea <cristian.ciocaltea@gmail.com>
Link: https://lore.kernel.org/r/87964ae012e513597b8b4c7be2e7ac332a70087a.1593788312.git.cristian.ciocaltea@gmail.com


Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 1a4ae413

drivers/clk/actions/owl-s500.c

+9 −0
Original line number Diff line number Diff line
@@ -175,6 +175,8 @@ static OWL_MUX(dev_clk, "dev_clk", dev_clk_mux_p, CMU_DEVPLL, 12, 1, CLK_SET_RAT 
static OWL_MUX(ahbprediv_clk, "ahbprediv_clk", ahbprediv_clk_mux_p, CMU_BUSCLK1, 8, 3, CLK_SET_RATE_PARENT);



/* gate clocks */

static OWL_GATE(gpio_clk, "gpio_clk", "apb_clk", CMU_DEVCLKEN0, 18, 0, 0);

static OWL_GATE(dmac_clk, "dmac_clk", "h_clk", CMU_DEVCLKEN0, 1, 0, 0);

static OWL_GATE(spi0_clk, "spi0_clk", "ahb_clk", CMU_DEVCLKEN1, 10, 0, CLK_IGNORE_UNUSED);

static OWL_GATE(spi1_clk, "spi1_clk", "ahb_clk", CMU_DEVCLKEN1, 11, 0, CLK_IGNORE_UNUSED);

static OWL_GATE(spi2_clk, "spi2_clk", "ahb_clk", CMU_DEVCLKEN1, 12, 0, CLK_IGNORE_UNUSED);
@@ -184,6 +186,7 @@ static OWL_GATE(hdmi_clk, "hdmi_clk", "hosc", CMU_DEVCLKEN1, 3, 0, 0); 


/* divider clocks */

static OWL_DIVIDER(h_clk, "h_clk", "ahbprediv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);

static OWL_DIVIDER(apb_clk, "apb_clk", "ahb_clk", CMU_BUSCLK1, 14, 2, NULL, 0, 0);

static OWL_DIVIDER(rmii_ref_clk, "rmii_ref_clk", "ethernet_pll_clk", CMU_ETHERNETPLL, 1, 1, rmii_ref_div_table, 0, 0);



/* factor clocks */
@@ -428,6 +431,9 @@ static struct owl_clk_common *s500_clks[] = { 
	&spdif_clk.common,

	&nand_clk.common,

	&ecc_clk.common,

	&apb_clk.common,

	&dmac_clk.common,

	&gpio_clk.common,

};



static struct clk_hw_onecell_data s500_hw_clks = {
@@ -484,6 +490,9 @@ static struct clk_hw_onecell_data s500_hw_clks = { 
		[CLK_SPDIF]		= &spdif_clk.common.hw,

		[CLK_NAND]		= &nand_clk.common.hw,

		[CLK_ECC]		= &ecc_clk.common.hw,

		[CLK_APB]		= &apb_clk.common.hw,

		[CLK_DMAC]		= &dmac_clk.common.hw,

		[CLK_GPIO]		= &gpio_clk.common.hw,

	},

	.num = CLK_NR_CLKS,

};

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