Commit b7e573bb authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARC updates from Vineet Gupta:

 - Wire up clone3 syscall

 - ARCv2 FPU state save/restore across context switch

 - AXS10x platform and misc fixes

* tag 'arc-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARCv2: fpu: preserve userspace fpu state
  ARC: fpu: declutter code, move bits out into fpu.h
  ARC: wireup clone3 syscall
  ARC: [plat-axs10x]: Add missing multicast filter number to GMAC node
  ARC: update feature support for jump-labels
parents a1084542 f45ba2bd
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+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@
    |         arch |status|
    -----------------------
    |       alpha: | TODO |
    |         arc: | TODO |
    |         arc: |  ok  |
    |         arm: |  ok  |
    |       arm64: |  ok  |
    |         c6x: | TODO |
+6 −10
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ config ARC
	select GENERIC_SMP_IDLE_THREAD
	select HAVE_ARCH_KGDB
	select HAVE_ARCH_TRACEHOOK
	select HAVE_COPY_THREAD_TLS
	select HAVE_DEBUG_STACKOVERFLOW
	select HAVE_DEBUG_KMEMLEAK
	select HAVE_FUTEX_CMPXCHG if FUTEX
@@ -350,9 +351,8 @@ config NODES_SHIFT
	  Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
	  zones.

if ISA_ARCOMPACT

config ARC_COMPACT_IRQ_LEVELS
	depends on ISA_ARCOMPACT
	bool "Setup Timer IRQ as high Priority"
	# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
	depends on !SMP
@@ -360,14 +360,10 @@ config ARC_COMPACT_IRQ_LEVELS
config ARC_FPU_SAVE_RESTORE
	bool "Enable FPU state persistence across context switch"
	help
	  Double Precision Floating Point unit had dedicated regs which
	  need to be saved/restored across context-switch.
	  Note that ARC FPU is overly simplistic, unlike say x86, which has
	  hardware pieces to allow software to conditionally save/restore,
	  based on actual usage of FPU by a task. Thus our implemn does
	  this for all tasks in system.

endif #ISA_ARCOMPACT
	  ARCompact FPU has internal registers to assist with Double precision
	  Floating Point operations. There are control and stauts registers
	  for floating point exceptions and rounding modes. These are
	  preserved across task context switch when enabled.

config ARC_CANT_LLSC
	def_bool n
+1 −0
Original line number Diff line number Diff line
@@ -78,6 +78,7 @@
			interrupt-names = "macirq";
			phy-mode = "rgmii";
			snps,pbl = < 32 >;
			snps,multicast-filter-bins = <256>;
			clocks = <&apbclk>;
			clock-names = "stmmaceth";
			max-speed = <100>;
+2 −0
Original line number Diff line number Diff line
@@ -39,6 +39,8 @@
#define ARC_REG_CLUSTER_BCR	0xcf
#define ARC_REG_AUX_ICCM	0x208	/* ICCM Base Addr (ARCv2) */
#define ARC_REG_LPB_CTRL	0x488	/* ARCv2 Loop Buffer control */
#define ARC_REG_FPU_CTRL	0x300
#define ARC_REG_FPU_STATUS	0x301

/* Common for ARCompact and ARCv2 status register */
#define ARC_REG_STATUS32	0x0A
+55 −0
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2020 Synopsys, Inc. (www.synopsys.com)
 *
 */

#ifndef _ASM_ARC_FPU_H
#define _ASM_ARC_FPU_H

#ifdef CONFIG_ARC_FPU_SAVE_RESTORE

#include <asm/ptrace.h>

#ifdef CONFIG_ISA_ARCOMPACT

/* These DPFP regs need to be saved/restored across ctx-sw */
struct arc_fpu {
	struct {
		unsigned int l, h;
	} aux_dpfp[2];
};

#define fpu_init_task(regs)

#else

/*
 * ARCv2 FPU Control aux register
 *   - bits to enable Traps on Exceptions
 *   - Rounding mode
 *
 * ARCv2 FPU Status aux register
 *   - FPU exceptions flags (Inv, Div-by-Zero, overflow, underflow, inexact)
 *   - Flag Write Enable to clear flags explicitly (vs. by fpu instructions
 *     only
 */

struct arc_fpu {
	unsigned int ctrl, status;
};

extern void fpu_init_task(struct pt_regs *regs);

#endif	/* !CONFIG_ISA_ARCOMPACT */

extern void fpu_save_restore(struct task_struct *p, struct task_struct *n);

#else	/* !CONFIG_ARC_FPU_SAVE_RESTORE */

#define fpu_save_restore(p, n)
#define fpu_init_task(regs)

#endif	/* CONFIG_ARC_FPU_SAVE_RESTORE */

#endif	/* _ASM_ARC_FPU_H */
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