Commit b7ce3415 authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Paul Mackerras
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[POWERPC] Implement support for the GPIO LIB API



This implements support for the GPIO LIB API.  Two calls are still
unimplemented though: irq_to_gpio and gpio_to_irq.

Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: default avatarGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 863fbf49
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Original line number Diff line number Diff line
@@ -88,6 +88,10 @@ Table of Contents
    3) OpenPIC Interrupt Controllers
    4) ISA Interrupt Controllers

  VIII - Specifying GPIO information for devices
    1) gpios property
    2) gpio-controller nodes

  Appendix A - Sample SOC node for MPC8540


@@ -3431,6 +3435,54 @@ encodings listed below:
	2 =  high to low edge sensitive type enabled
	3 =  low to high edge sensitive type enabled

VIII - Specifying GPIO information for devices
==============================================

1) gpios property
-----------------

Nodes that makes use of GPIOs should define them using `gpios' property,
format of which is: <&gpio-controller1-phandle gpio1-specifier
		     &gpio-controller2-phandle gpio2-specifier
		     0 /* holes are permitted, means no GPIO 3 */
		     &gpio-controller4-phandle gpio4-specifier
		     ...>;

Note that gpio-specifier length is controller dependent.

gpio-specifier may encode: bank, pin position inside the bank,
whether pin is open-drain and whether pin is logically inverted.

Example of the node using GPIOs:

	node {
		gpios = <&qe_pio_e 18 0>;
	};

In this example gpio-specifier is "18 0" and encodes GPIO pin number,
and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.

2) gpio-controller nodes
------------------------

Every GPIO controller node must have #gpio-cells property defined,
this information will be used to translate gpio-specifiers.

Example of two SOC GPIO banks defined as gpio-controller nodes:

	qe_pio_a: gpio-controller@1400 {
		#gpio-cells = <2>;
		compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
		reg = <0x1400 0x18>;
		gpio-controller;
	};

	qe_pio_e: gpio-controller@1460 {
		#gpio-cells = <2>;
		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
		reg = <0x1460 0x18>;
		gpio-controller;
	};

Appendix A - Sample SOC node for MPC8540
========================================
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Original line number Diff line number Diff line
@@ -81,6 +81,11 @@ config GENERIC_FIND_NEXT_BIT
	bool
	default y

config GENERIC_GPIO
	bool
	help
	  Generic GPIO API support

config ARCH_NO_VIRT_TO_BUS
	def_bool PPC64

+56 −0
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/*
 * Generic GPIO API implementation for PowerPC.
 *
 * Copyright (c) 2007-2008  MontaVista Software, Inc.
 *
 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef __ASM_POWERPC_GPIO_H
#define __ASM_POWERPC_GPIO_H

#include <linux/errno.h>
#include <asm-generic/gpio.h>

#ifdef CONFIG_HAVE_GPIO_LIB

/*
 * We don't (yet) implement inlined/rapid versions for on-chip gpios.
 * Just call gpiolib.
 */
static inline int gpio_get_value(unsigned int gpio)
{
	return __gpio_get_value(gpio);
}

static inline void gpio_set_value(unsigned int gpio, int value)
{
	__gpio_set_value(gpio, value);
}

static inline int gpio_cansleep(unsigned int gpio)
{
	return __gpio_cansleep(gpio);
}

/*
 * Not implemented, yet.
 */
static inline int gpio_to_irq(unsigned int gpio)
{
	return -ENOSYS;
}

static inline int irq_to_gpio(unsigned int irq)
{
	return -EINVAL;
}

#endif /* CONFIG_HAVE_GPIO_LIB */

#endif /* __ASM_POWERPC_GPIO_H */