Commit b746bb77 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Linus Torvalds
Browse files

aty128fb: Properly save PCI state before changing PCI PM level 



This fixes aty128fb to properly save the PCI config space -before- it
potentially switches the PM state of the chip. This avoids a
warning with the new PM core and is the right thing to do anyway.

I also replaced the hand-coded switch to D2 with a call to the
genericc pci_set_power_state() and removed the code that switches it
back to D0 since the generic code is doing that for us nowadays.

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent b7468168

drivers/video/aty/aty128fb.c

+15 −10
Original line number Diff line number Diff line
@@ -2374,6 +2374,8 @@ static void aty128_set_suspend(struct aty128fb_par *par, int suspend) 
	/* Set the chip into the appropriate suspend mode (we use D2,

	 * D3 would require a complete re-initialisation of the chip,

	 * including PCI config registers, clocks, AGP configuration, ...)

	 *

	 * For resume, the core will have already brought us back to D0

	 */

	if (suspend) {

		/* Make sure CRTC2 is reset. Remove that the day we decide to
@@ -2391,17 +2393,9 @@ static void aty128_set_suspend(struct aty128fb_par *par, int suspend) 
		aty_st_le32(BUS_CNTL1, 0x00000010);

		aty_st_le32(MEM_POWER_MISC, 0x0c830000);

		mdelay(100);

		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);



		/* Switch PCI power management to D2 */

		pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL,

			(pwr_command & ~PCI_PM_CTRL_STATE_MASK) | 2);

		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);

	} else {

		/* Switch back PCI power management to D0 */

		mdelay(100);

		pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL, 0);

		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);

		mdelay(100);

		pci_set_power_state(pdev, PCI_D2);

	}

}
@@ -2410,6 +2404,12 @@ static int aty128_pci_suspend(struct pci_dev *pdev, pm_message_t state) 
	struct fb_info *info = pci_get_drvdata(pdev);

	struct aty128fb_par *par = info->par;



	/* Because we may change PCI D state ourselves, we need to

	 * first save the config space content so the core can

	 * restore it properly on resume.

	 */

	pci_save_state(pdev);



	/* We don't do anything but D2, for now we return 0, but

	 * we may want to change that. How do we know if the BIOS

	 * can properly take care of D3 ? Also, with swsusp, we
@@ -2476,6 +2476,11 @@ static int aty128_do_resume(struct pci_dev *pdev) 
	if (pdev->dev.power.power_state.event == PM_EVENT_ON)

		return 0;



	/* PCI state will have been restored by the core, so

	 * we should be in D0 now with our config space fully

	 * restored

	 */



	/* Wakeup chip */

	aty128_set_suspend(par, 0);

	par->asleep = 0;

CRA Git | Maintained and supported by SUSTech CRA and CCSE