Commit b7404a29 authored Jul 01, 2020 by Heikki Krogerus Committed by Greg Kroah-Hartman Jul 01, 2020

usb: typec: intel_pmc_mux: Definitions for response status bits



Adding definitions for the two status bits that we have in
the command response data structure.

Also, from now on only considering the second status bit,
which tells was the failure fatal or not, if the first bit
is set. If the first bit is not set, then the command was
successful, and we need to ignore the second bit.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20200701115618.22482-4-heikki.krogerus@linux.intel.com


Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent ad8db94d

drivers/usb/typec/mux/intel_pmc_mux.c

+6 −2

Original line number	Diff line number	Diff line
		@@ -19,6 +19,10 @@

		#define PMC_USBC_CMD 0xa7

		/* Response status bits */
		#define PMC_USB_RESP_STATUS_FAILURE BIT(0)
		#define PMC_USB_RESP_STATUS_FATAL BIT(1)

		/* "Usage" OOB Message field values */
		enum {
		PMC_USB_CONNECT,
		@@ -130,8 +134,8 @@ static int pmc_usb_command(struct pmc_usb_port port, u8 msg, u32 len)
		*/
		intel_scu_ipc_dev_command(port->pmc->ipc, PMC_USBC_CMD, 0, msg, len,
		response, sizeof(response));
		if (response[2]) {
		if (response[2] & BIT(1))
		if (response[2] & PMC_USB_RESP_STATUS_FAILURE) {
		if (response[2] & PMC_USB_RESP_STATUS_FATAL)
		return -EIO;
		return -EBUSY;
		}

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