platform/x86: intel_scu_ipc: Drop intel_scu_ipc_io[read|write][8|16]() (b7380a16) · Commits · 戴 / test

arch/x86/include/asm/intel_scu_ipc.h

+0 −12

Original line number	Diff line number	Diff line
		@@ -22,24 +22,12 @@
		/* Read single register */
		int intel_scu_ipc_ioread8(u16 addr, u8 *data);

		/* Read two sequential registers */
		int intel_scu_ipc_ioread16(u16 addr, u16 *data);

		/* Read four sequential registers */
		int intel_scu_ipc_ioread32(u16 addr, u32 *data);

		/* Read a vector */
		int intel_scu_ipc_readv(u16 addr, u8 data, int len);

		/* Write single register */
		int intel_scu_ipc_iowrite8(u16 addr, u8 data);

		/* Write two sequential registers */
		int intel_scu_ipc_iowrite16(u16 addr, u16 data);

		/* Write four sequential registers */
		int intel_scu_ipc_iowrite32(u16 addr, u32 data);

		/* Write a vector */
		int intel_scu_ipc_writev(u16 addr, u8 data, int len);

drivers/platform/x86/intel_scu_ipc.c

+0 −68

Original line number	Diff line number	Diff line
		@@ -237,40 +237,6 @@ int intel_scu_ipc_ioread8(u16 addr, u8 *data)
		}
		EXPORT_SYMBOL(intel_scu_ipc_ioread8);

		/**
		* intel_scu_ipc_ioread16 - read a word via the SCU
		* @addr: register on SCU
		* @data: return pointer for read word
		*
		* Read a register pair. Returns 0 on success or an error code. All
		* locking between SCU accesses is handled for the caller.
		*
		* This function may sleep.
		*/
		int intel_scu_ipc_ioread16(u16 addr, u16 *data)
		{
		u16 x[2] = {addr, addr + 1};
		return pwr_reg_rdwr(x, (u8 *)data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_R);
		}
		EXPORT_SYMBOL(intel_scu_ipc_ioread16);

		/**
		* intel_scu_ipc_ioread32 - read a dword via the SCU
		* @addr: register on SCU
		* @data: return pointer for read dword
		*
		* Read four registers. Returns 0 on success or an error code. All
		* locking between SCU accesses is handled for the caller.
		*
		* This function may sleep.
		*/
		int intel_scu_ipc_ioread32(u16 addr, u32 *data)
		{
		u16 x[4] = {addr, addr + 1, addr + 2, addr + 3};
		return pwr_reg_rdwr(x, (u8 *)data, 4, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_R);
		}
		EXPORT_SYMBOL(intel_scu_ipc_ioread32);

		/**
		* intel_scu_ipc_iowrite8 - write a byte via the SCU
		* @addr: register on SCU
		@@ -287,40 +253,6 @@ int intel_scu_ipc_iowrite8(u16 addr, u8 data)
		}
		EXPORT_SYMBOL(intel_scu_ipc_iowrite8);

		/**
		* intel_scu_ipc_iowrite16 - write a word via the SCU
		* @addr: register on SCU
		* @data: word to write
		*
		* Write two registers. Returns 0 on success or an error code. All
		* locking between SCU accesses is handled for the caller.
		*
		* This function may sleep.
		*/
		int intel_scu_ipc_iowrite16(u16 addr, u16 data)
		{
		u16 x[2] = {addr, addr + 1};
		return pwr_reg_rdwr(x, (u8 *)&data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_W);
		}
		EXPORT_SYMBOL(intel_scu_ipc_iowrite16);

		/**
		* intel_scu_ipc_iowrite32 - write a dword via the SCU
		* @addr: register on SCU
		* @data: dword to write
		*
		* Write four registers. Returns 0 on success or an error code. All
		* locking between SCU accesses is handled for the caller.
		*
		* This function may sleep.
		*/
		int intel_scu_ipc_iowrite32(u16 addr, u32 data)
		{
		u16 x[4] = {addr, addr + 1, addr + 2, addr + 3};
		return pwr_reg_rdwr(x, (u8 *)&data, 4, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_W);
		}
		EXPORT_SYMBOL(intel_scu_ipc_iowrite32);

		/**
		* intel_scu_ipc_readvv - read a set of registers
		* @addr: register list

Admin message