Commit b70cd406 authored Apr 24, 2017 by Vladimir Murzin Committed by Russell King Apr 26, 2017

ARM: 8671/1: V7M: Preserve registers across switch from Thread to Handler mode



According to ARMv7 ARM, when exception is taken content of r0-r3, r12
is unknown (see ExceptionTaken() pseudocode). Even though existent
implementations keep these register unchanged, preserve them to be in
line with architecture.

Reported-by: Dobromir Stefanov <dobromir.stefanov@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

parent 6f05d076

arch/arm/mm/proc-v7m.S

+2 −0

Original line number	Diff line number	Diff line
		@@ -135,9 +135,11 @@ __v7m_setup_cont:
		dsb
		mov r6, lr @ save LR
		ldr sp, =init_thread_union + THREAD_START_SP
		stmia sp, {r0-r3, r12}
		cpsie i
		svc #0
		1: cpsid i
		ldmia sp, {r0-r3, r12}
		str r5, [r12, #11 * 4] @ restore the original SVC vector entry
		mov lr, r6 @ restore LR

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