Commit b6f7cd7f authored May 08, 2019 by Leo Yan Committed by Wei Xu Jun 19, 2019

arm64: dts: hi6220: Update coresight DT bindings



CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.

This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.

Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

parent a188339c

arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi

+3 −3

Original line number	Diff line number	Diff line
		@@ -15,7 +15,7 @@
		/ {
		soc {
		funnel@f6401000 {
		compatible = "arm,coresight-funnel", "arm,primecell";
		compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
		reg = <0 0xf6401000 0 0x1000>;
		clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
		clock-names = "apb_pclk";
		@@ -65,7 +65,7 @@
		};

		replicator {
		compatible = "arm,coresight-replicator";
		compatible = "arm,coresight-static-replicator";
		clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
		clock-names = "apb_pclk";

		@@ -133,7 +133,7 @@
		};

		funnel@f6501000 {
		compatible = "arm,coresight-funnel", "arm,primecell";
		compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
		reg = <0 0xf6501000 0 0x1000>;
		clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
		clock-names = "apb_pclk";

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