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This patch adds support for multi-chip NAND devices to the FSL-UPM driver. This requires support for multiple GPIOs for the RNB pins. The NAND chips are selected through address lines defined by the FDT property "fsl,upm-addr-line-cs-offsets". Signed-off-by:Wolfgang Grandegger <wg@grandegger.com> Acked-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
David Woodhouse <David.Woodhouse@intel.com>
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