Commit b6c4bc65 authored by Wanpeng Li's avatar Wanpeng Li Committed by Paolo Bonzini
Browse files

KVM: LAPIC: Optimize timer latency further 



Advance lapic timer tries to hidden the hypervisor overhead between the
host emulated timer fires and the guest awares the timer is fired. However,
it just hidden the time between apic_timer_fn/handle_preemption_timer ->
wait_lapic_expire, instead of the real position of vmentry which is
mentioned in the orignial commit d0659d94 ("KVM: x86: add option to
advance tscdeadline hrtimer expiration"). There is 700+ cpu cycles between
the end of wait_lapic_expire and before world switch on my haswell desktop.

This patch tries to narrow the last gap(wait_lapic_expire -> world switch),
it takes the real overhead time between apic_timer_fn/handle_preemption_timer
and before world switch into consideration when adaptively tuning timer
advancement. The patch can reduce 40% latency (~1600+ cycles to ~1000+ cycles
on a haswell desktop) for kvm-unit-tests/tscdeadline_latency when testing
busy waits.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Liran Alon <liran.alon@oracle.com>
Reviewed-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: default avatarWanpeng Li <wanpengli@tencent.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent ec0671d5

arch/x86/kvm/lapic.c

+2 −1
Original line number Diff line number Diff line
@@ -1531,7 +1531,7 @@ static inline void adjust_lapic_timer_advance(struct kvm_vcpu *vcpu, 
	apic->lapic_timer.timer_advance_ns = timer_advance_ns;

}



void wait_lapic_expire(struct kvm_vcpu *vcpu)

void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu)

{

	struct kvm_lapic *apic = vcpu->arch.apic;

	u64 guest_tsc, tsc_deadline;
@@ -1553,6 +1553,7 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu) 
	if (unlikely(!apic->lapic_timer.timer_advance_adjust_done))

		adjust_lapic_timer_advance(vcpu, apic->lapic_timer.advance_expire_delta);

}

EXPORT_SYMBOL_GPL(kvm_wait_lapic_expire);



static void start_sw_tscdeadline(struct kvm_lapic *apic)

{

arch/x86/kvm/lapic.h

+1 −1
Original line number Diff line number Diff line
@@ -220,7 +220,7 @@ static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu) 


bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);



void wait_lapic_expire(struct kvm_vcpu *vcpu);

void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu);



bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,

			struct kvm_vcpu **dest_vcpu);

arch/x86/kvm/svm.c

+4 −0
Original line number Diff line number Diff line
@@ -5643,6 +5643,10 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) 
	clgi();

	kvm_load_guest_xcr0(vcpu);



	if (lapic_in_kernel(vcpu) &&

		vcpu->arch.apic->lapic_timer.timer_advance_ns)

		kvm_wait_lapic_expire(vcpu);



	/*

	 * If this vCPU has touched SPEC_CTRL, restore the guest's value if

	 * it's non-zero. Since vmentry is serialising on affected CPUs, there

arch/x86/kvm/vmx/vmx.c

+4 −0
Original line number Diff line number Diff line
@@ -6445,6 +6445,10 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu) 


	vmx_update_hv_timer(vcpu);



	if (lapic_in_kernel(vcpu) &&

		vcpu->arch.apic->lapic_timer.timer_advance_ns)

		kvm_wait_lapic_expire(vcpu);



	/*

	 * If this vCPU has touched SPEC_CTRL, restore the guest's value if

	 * it's non-zero. Since vmentry is serialising on affected CPUs, there

arch/x86/kvm/x86.c

+0 −3
Original line number Diff line number Diff line
@@ -7922,9 +7922,6 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) 
	}



	trace_kvm_entry(vcpu->vcpu_id);

	if (lapic_in_kernel(vcpu) &&

	    vcpu->arch.apic->lapic_timer.timer_advance_ns)

		wait_lapic_expire(vcpu);

	guest_enter_irqoff();



	fpregs_assert_state_consistent();

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