Commit b68f95a5 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'zynqmp-dt-for-v4.19-v2' of https://github.com/Xilinx/linux-xlnx into next/dt

arm: dts: zynqmp: DT changes for v4.19

- Use serdev for BT in zcu100
- Remove ep108
- Fix gpio-keys binding
- Add suport for Ultra96

* tag 'zynqmp-dt-for-v4.19-v2' of https://github.com/Xilinx/linux-xlnx

:
  arm64: dts: zynqmp: Add support for Avnet Ultra96 rev1 board
  arm64: dts: zynqmp: Remove #address/#size-cells from gpio-keys
  arm64: dts: zynqmp: Remove ep108 board
  arm64: dts: zynqmp: Use serdev for zcu100 BT

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 7f502f8b 41ee3e38
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += avnet-ultra96-rev1.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1232-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1254-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1275-revA.dtb
+19 −0
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// SPDX-License-Identifier: GPL-2.0+
/*
 * dts file for Avnet Ultra96 rev1
 *
 * (C) Copyright 2018, Xilinx, Inc.
 *
 * Michal Simek <michal.simek@xilinx.com>
 */

/dts-v1/;

#include "zynqmp-zcu100-revC.dts"

/ {
	model = "Avnet Ultra96 Rev1";
	compatible = "avnet,ultra96-rev1", "avnet,ultra96",
		     "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100",
		     "xlnx,zynqmp";
};
+0 −137
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// SPDX-License-Identifier: GPL-2.0+
/*
 * clock specification for Xilinx ZynqMP ep108 development board
 *
 * (C) Copyright 2015, Xilinx, Inc.
 *
 * Michal Simek <michal.simek@xilinx.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 */

/ {
	misc_clk: misc_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	i2c_clk: i2c_clk {
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <111111111>;
	};

	sata_clk: sata_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <75000000>;
	};

	clk100: clk100 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
	};

	clk600: clk600 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <600000000>;
	};
};

&can0 {
	clocks = <&misc_clk &misc_clk>;
};

&can1 {
	clocks = <&misc_clk &misc_clk>;
};

&fpd_dma_chan1 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan2 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan3 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan4 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan5 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan6 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan7 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan8 {
	clocks = <&clk600>, <&clk100>;
};

&gem0 {
	clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
};

&gpio {
	clocks = <&misc_clk>;
};

&i2c0 {
	clocks = <&i2c_clk>;
};

&i2c1 {
	clocks = <&i2c_clk>;
};

&sata {
	clocks = <&sata_clk>;
};

&sdhci0 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&sdhci1 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&spi0 {
	clocks = <&misc_clk &misc_clk>;
};

&spi1 {
	clocks = <&misc_clk &misc_clk>;
};

&uart0 {
	clocks = <&misc_clk &misc_clk>;
};

&usb0 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&usb1 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&watchdog0 {
	clocks= <&misc_clk>;
};
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// SPDX-License-Identifier: GPL-2.0+
/*
 * dts file for Xilinx ZynqMP ep108 development board
 *
 * (C) Copyright 2014 - 2015, Xilinx, Inc.
 *
 * Michal Simek <michal.simek@xilinx.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 */

/dts-v1/;

#include "zynqmp.dtsi"
#include "zynqmp-ep108-clk.dtsi"

/ {
	model = "ZynqMP EP108";

	aliases {
		mmc0 = &sdhci0;
		mmc1 = &sdhci1;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x40000000>;
	};
};

&can0 {
	status = "okay";
};

&can1 {
	status = "okay";
};

&gem0 {
	status = "okay";
	phy-handle = <&phy0>;
	phy-mode = "rgmii-id";
	phy0: phy@0 {
		reg = <0>;
		max-speed = <100>;
	};
};

&gpio {
	status = "okay";
};

&i2c0 {
	status = "okay";
	clock-frequency = <400000>;
	eeprom@54 {
		compatible = "atmel,24c64";
		reg = <0x54>;
	};
};

&i2c1 {
	status = "okay";
	clock-frequency = <400000>;
	eeprom@55 {
		compatible = "atmel,24c64";
		reg = <0x55>;
	};
};

&sata {
	status = "okay";
	ceva,broken-gen2;
	/* SATA Phy OOB timing settings */
	ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
	ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
	ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
	ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
	ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
	ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
	ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
	ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
};

&sdhci0 {
	status = "okay";
	bus-width = <8>;
};

&sdhci1 {
	status = "okay";
};

&spi0 {
	status = "okay";
	num-cs = <1>;
	spi0_flash0: spi0_flash0@0 {
		compatible = "m25p80";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		reg = <0>;

		spi0_flash0@0 {
			label = "spi0_flash0";
			reg = <0x0 0x100000>;
		};
	};
};

&spi1 {
	status = "okay";
	num-cs = <1>;
	spi1_flash0: spi1_flash0@0 {
		compatible = "m25p80";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		reg = <0>;

		spi1_flash0@0 {
			label = "spi1_flash0";
			reg = <0x0 0x100000>;
		};
	};
};

&uart0 {
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "peripheral";
	maximum-speed = "high-speed";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
	maximum-speed = "high-speed";
};

&watchdog0 {
	status = "okay";
};
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@@ -44,8 +44,6 @@

	gpio-keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		autorepeat;
		sw4 {
			label = "sw4";
@@ -89,12 +87,6 @@
			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};

		bt_power {
			label = "bt_power";
			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
	};

	wmmcsdio_fixed: fixedregulator-mmcsdio {
@@ -267,6 +259,10 @@

&uart0 {
	status = "okay";
	bluetooth {
		compatible = "ti,wl1831-st";
		enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
	};
};

&uart1 {
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