Commit b66d1ac8 authored by Maxime Ripard's avatar Maxime Ripard Committed by Kishon Vijay Abraham I
Browse files

dt-bindings: usb: Convert Allwinner A80 USB PHY controller to a schema



The Allwinner A80 SoCs have a USB PHY controller that is used by Linux,
with a matching Device Tree binding.

Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.

Reviewed-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent b109c13a
Loading
Loading
Loading
Loading
+135 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A80 USB PHY Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

properties:
  "#phy-cells":
    const: 0

  compatible:
    const: allwinner,sun9i-a80-usb-phy

  reg:
    maxItems: 1

  clocks:
    anyOf:
      - description: Main PHY Clock

      - items:
          - description: Main PHY clock
          - description: HSIC 12MHz clock
          - description: HSIC 480MHz clock

  clock-names:
    oneOf:
      - const: phy

      - items:
          - const: phy
          - const: hsic_12M
          - const: hsic_480M

  resets:
    anyOf:
      - description: Normal USB PHY reset

      - items:
          - description: Normal USB PHY reset
          - description: HSIC Reset

  reset-names:
    oneOf:
      - const: phy

      - items:
          - const: phy
          - const: hsic

  phy_type:
    const: hsic
    description:
      When absent, the PHY type will be assumed to be normal USB.

  phy-supply:
    description:
      Regulator that powers VBUS

required:
  - "#phy-cells"
  - compatible
  - reg
  - clocks
  - clock-names
  - resets
  - reset-names

additionalProperties: false

if:
  properties:
    phy_type:
      const: hsic

  required:
    - phy_type

then:
  properties:
    clocks:
      maxItems: 3

    clock-names:
      maxItems: 3

    resets:
      maxItems: 2

    reset-names:
      maxItems: 2

examples:
  - |
    #include <dt-bindings/clock/sun9i-a80-usb.h>
    #include <dt-bindings/reset/sun9i-a80-usb.h>

    usbphy1: phy@a00800 {
        compatible = "allwinner,sun9i-a80-usb-phy";
        reg = <0x00a00800 0x4>;
        clocks = <&usb_clocks CLK_USB0_PHY>;
        clock-names = "phy";
        resets = <&usb_clocks RST_USB0_PHY>;
        reset-names = "phy";
        phy-supply = <&reg_usb1_vbus>;
        #phy-cells = <0>;
    };

  - |
    #include <dt-bindings/clock/sun9i-a80-usb.h>
    #include <dt-bindings/reset/sun9i-a80-usb.h>

    usbphy3: phy@a02800 {
        compatible = "allwinner,sun9i-a80-usb-phy";
        reg = <0x00a02800 0x4>;
        clocks = <&usb_clocks CLK_USB2_PHY>,
                 <&usb_clocks CLK_USB_HSIC>,
                 <&usb_clocks CLK_USB2_HSIC>;
        clock-names = "phy",
                      "hsic_12M",
                      "hsic_480M";
        resets = <&usb_clocks RST_USB2_PHY>,
                 <&usb_clocks RST_USB2_HSIC>;
        reset-names = "phy",
                      "hsic";
        phy_type = "hsic";
        phy-supply = <&reg_usb3_vbus>;
        #phy-cells = <0>;
    };
+0 −37
Original line number Diff line number Diff line
Allwinner sun9i USB PHY
-----------------------

Required properties:
- compatible : should be one of
  * allwinner,sun9i-a80-usb-phy
- reg : a list of offset + length pairs
- #phy-cells : from the generic phy bindings, must be 0
- phy_type : "hsic" for HSIC usage;
	     other values or absence of this property indicates normal USB
- clocks : phandle + clock specifier for the phy clocks
- clock-names : depending on the "phy_type" property,
  * "phy" for normal USB
  * "hsic_480M", "hsic_12M" for HSIC
- resets : a list of phandle + reset specifier pairs
- reset-names : depending on the "phy_type" property,
  * "phy" for normal USB
  * "hsic" for HSIC

Optional Properties:
- phy-supply : from the generic phy bindings, a phandle to a regulator that
	       provides power to VBUS.

It is recommended to list all clocks and resets available.
The driver will only use those matching the phy_type.

Example:
	usbphy1: phy@a01800 {
		compatible = "allwinner,sun9i-a80-usb-phy";
		reg = <0x00a01800 0x4>;
		clocks = <&usb_phy_clk 2>, <&usb_phy_clk 10>,
		       <&usb_phy_clk 3>;
		clock-names = "hsic_480M", "hsic_12M", "phy";
		resets = <&usb_phy_clk 18>, <&usb_phy_clk 19>;
		reset-names = "hsic", "phy";
		#phy-cells = <0>;
	};