Commit b6095b08 authored by Christoffer Dall's avatar Christoffer Dall Committed by Christoffer Dall
Browse files

KVM: arm/arm64: vgic: Get rid of unnecessary save_maint_int_state 



Now when we don't look at the MISR and EISR values anymore, we can get
rid of the logic to save them in the GIC save/restore code.

Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
parent af061499

virt/kvm/arm/hyp/vgic-v2-sr.c

+0 −40
Original line number Diff line number Diff line
@@ -22,45 +22,6 @@ 
#include <asm/kvm_emulate.h>

#include <asm/kvm_hyp.h>



static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu,

					    void __iomem *base)

{

	struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;

	u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;

	u32 eisr0, eisr1;

	int i;

	bool expect_mi;



	expect_mi = !!(cpu_if->vgic_hcr & GICH_HCR_UIE);



	for (i = 0; i < used_lrs && !expect_mi; i++)

		expect_mi |= (!(cpu_if->vgic_lr[i] & GICH_LR_HW) &&

			      (cpu_if->vgic_lr[i] & GICH_LR_EOI));



	if (expect_mi) {

		cpu_if->vgic_misr = readl_relaxed(base + GICH_MISR);



		if (cpu_if->vgic_misr & GICH_MISR_EOI) {

			eisr0  = readl_relaxed(base + GICH_EISR0);

			if (unlikely(used_lrs > 32))

				eisr1  = readl_relaxed(base + GICH_EISR1);

			else

				eisr1 = 0;

		} else {

			eisr0 = eisr1 = 0;

		}

	} else {

		cpu_if->vgic_misr = 0;

		eisr0 = eisr1 = 0;

	}



#ifdef CONFIG_CPU_BIG_ENDIAN

	cpu_if->vgic_eisr = ((u64)eisr0 << 32) | eisr1;

#else

	cpu_if->vgic_eisr = ((u64)eisr1 << 32) | eisr0;

#endif

}



static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base)

{

	struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
@@ -111,7 +72,6 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu) 
	if (used_lrs) {

		cpu_if->vgic_apr = readl_relaxed(base + GICH_APR);



		save_maint_int_state(vcpu, base);

		save_elrsr(vcpu, base);

		save_lrs(vcpu, base);

virt/kvm/arm/hyp/vgic-v3-sr.c

+0 −29
Original line number Diff line number Diff line
@@ -118,33 +118,6 @@ static void __hyp_text __gic_v3_set_lr(u64 val, int lr) 
	}

}



static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu)

{

	struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3;

	int i;

	bool expect_mi;

	u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;



	expect_mi = !!(cpu_if->vgic_hcr & ICH_HCR_UIE);



	for (i = 0; i < used_lrs; i++) {

		expect_mi |= (!(cpu_if->vgic_lr[i] & ICH_LR_HW) &&

			      (cpu_if->vgic_lr[i] & ICH_LR_EOI));

	}



	if (expect_mi) {

		cpu_if->vgic_misr  = read_gicreg(ICH_MISR_EL2);



		if (cpu_if->vgic_misr & ICH_MISR_EOI)

			cpu_if->vgic_eisr = read_gicreg(ICH_EISR_EL2);

		else

			cpu_if->vgic_eisr = 0;

	} else {

		cpu_if->vgic_misr = 0;

		cpu_if->vgic_eisr = 0;

	}

}



void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)

{

	struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3;
@@ -168,8 +141,6 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu) 
		val = read_gicreg(ICH_VTR_EL2);

		nr_pri_bits = vtr_to_nr_pri_bits(val);



		save_maint_int_state(vcpu);



		for (i = 0; i <= used_lrs; i++) {

			if (cpu_if->vgic_elrsr & (1 << i))

				cpu_if->vgic_lr[i] &= ~ICH_LR_STATE;

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